Am29337
Abstract: No abstract text available
Text: Am29337 16-Bit Bounds Checker Double Comparator Out-of-Bounds Flag - C om pares a 16-bit input num ber with a low er lim it and an upper limit - Flags values th a t are outside the bounds of a lower and an upper limit Cascadable Compares Signed or Unsigned Numbers
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Am29337
16-Bit
28-Pin
WF023040
ICR00480
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PDF
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SD4028
Abstract: AM29331 AM29C323 Am29337 Am29325 AM29114 bit-slice ScansUX970 am29c332
Text: Am29337 ÎI 16-Bit Bounds Checker • Double Comparator - Compares a 16-bit input number with a lower limit and an upper limit Cascadable - 16-bit cascadable to longer words Out-of-Bounds Flag - Flags values that are outside the bounds of a lower and an upper limit
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Am29337
16-Bit
28-Pln
KS000010
SD4028
AM29331
AM29C323
Am29325
AM29114
bit-slice
ScansUX970
am29c332
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PDF
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Am29337
Abstract: AM29337DC Am29C00 am29c332
Text: Am29337 H 16-Bit Bounds Checker Double Comparator - Compares a 16-bit input number with a lower limit and an upper limit • • C a s c a d a b le • • - 16-bit cascadable to longer words Out-of-Bound« Flag - Flags values that are outside the bounds of a lower
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Am29337
16-Bit
28-Pln
AM29337DC
Am29C00
am29c332
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PDF
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Untitled
Abstract: No abstract text available
Text: Am 29332 32-Bit Arithmetic Logic Unit • Single Chip, 32-Bit ALU Supports 8 0 -9 0 ns m icrocycle tim e fo r the 32-bit data path. It is a com binatorial ALU with equal cy cle tim e fo r all instructions. Flow -through A rchitecture A com binatorial ALU with tw o input data ports and
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32-Bit
32-bit
WF023691
Y0-Y31
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k0312
Abstract: yb06 YB04 YA16 apl 117 yb07 y802 AWa3 74N10 V18-Y3S
Text: Am29C334 CMOS Four-Port Dual-Access Register File PRELIMINARY • 64 x 18 Bit W ide R egister File The Am29C334 is a 64 x 18-bit, dual-access RAM with tw o read ports and two write ports. Pipelined Data Path The Am 29C334 can be configured to support either a
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Am29C334
18-bit,
Am29334
TC003424
k0312
yb06
YB04
YA16
apl 117
yb07
y802
AWa3
74N10
V18-Y3S
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PDF
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AM29331
Abstract: AM 29300 Family
Text: Am29331 16-Bit Microprogram Sequencer • • 16-Bits A ddress up to 64K W ords Supports 80-90 ns m icrocycle time for a 32-bit highperform ance system w hen used with the other m embers o f the Am 29300 Family. Real-Tim e Interrupt Support Micro-trap and interrupts are handled transparently
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Am29331
16-Bit
16-Bits
32-bit
ICR0W80
AM 29300 Family
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PDF
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am29325
Abstract: H-14 AM29325GC WF023740 ScansUX970 TB000640
Text: Am29325 32-Bit Floating-Point Processor • Single VLSI device performs high-speed floating-point arithmetic - Floating-point addition, subtraction, and multiplication in a single clock cycle - Internal architecture supports sum-of-products, Newton-Raphson division
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Am29325
32-Bit
32-bit,
16-bit
WF023790
WF023800
WF023810
16-Bit,
H-14
AM29325GC
WF023740
ScansUX970
TB000640
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PDF
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YB17
Abstract: A09 N03 yb04 b09 n03 GE H11 A10 K/1/64W am29c332
Text: Am29C334 CMOS Four-Port Dual-Access Register File PRELIMINARY 64 x 18 Bit W ide R egister File The Am 29C334 is a 64 x 18-bit, dual-access RAM with tw o read ports and two write ports. Pipelined D ata Path The Am 29C 334 can be configured to support either a
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Am29C334
18-bit,
29C334
Am29C3mwmw
TC003424
YB17
A09 N03
yb04
b09 n03
GE H11 A10
K/1/64W
am29c332
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PDF
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Untitled
Abstract: No abstract text available
Text: Am29338 32-Bit Byte Queue ADVANCE INFO R M ATIO N A synchronous and Synchronous O peration - S upports com m unication between system s w ith differ e nt clocks and different bus w idths Retransm it - Data can be read out repeatedly Horizontal Cascading
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Am29338
32-Bit
F02347)
ICR00480
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PDF
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d82L
Abstract: ir3104
Text: Am29332 DISTINCTIVE CHARACTERISTICS • • • Single Chip, 32-Bit ALU S upports 8 0 -9 0 ns m icrocycle tim e for the 32-bit data path. It is a com binatorial ALU w ith equal cy cle tim e fo r all instructions. Flow -through A rchitecture A com binatorial ALU with tw o input data ports and
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Am29332
32-Bit
WF023691
5000000O0OOOOT'
WF023700
WF023710
d82L
ir3104
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PDF
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TC001107
Abstract: Modified Booth Multipliers DB21 OA10 OA21 block diagram 8 bit booth multiplier am29c332
Text: Am29C332 CMOS 32-Bit Arithmetic Logic Unit ADVANCE INFORMATION Supports All Data Types It supports one-, two-, three- and four-byte data for all operations and variable-length fields for logical operations. Multiply and Divide Support Built-in hardware to support tw o-bit-at-a-tim e m odi
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Am29C332
32-Bit
80-ns
64-Bit
da0-da31,
TC001107
Modified Booth Multipliers
DB21
OA10
OA21
block diagram 8 bit booth multiplier
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PDF
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lzl 24h
Abstract: pioneer PAL 007 A CNC DRIVES ford EEC V pioneer PEG 468 AM27S43 AM29300 am29325 Am29434 YA11
Text: a 32-Bit Microprosrammable Products Am29C300/29300 1 9 8 8 D ata B o o k Advanced Micro D e v ic e s a Advanced Micro Devices Am29C300/29300 Data Book 1988 Advanced Micro Devices Advanced Micro Devices reserves the right to make changes in its products without
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32-Bit
Am29C300/29300
B-33M-1/88-0
9372A
lzl 24h
pioneer PAL 007 A
CNC DRIVES
ford EEC V
pioneer PEG 468
AM27S43
AM29300
am29325
Am29434
YA11
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PDF
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AM29331
Abstract: Am29300 ScansUX970 AM29331GC
Text: Am29331 16-Bit Microprogram Sequencer DISTINCTIVE CHARACTERISTICS 16-Bits Address up to 64K Words Supports 80-90 ns microcycle time for a 32-bit highperformance system when used with the other members of the Am29300 Family. Real-Time Interrupt Support Micro-trap and interrupts are handled transparently
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Am29331
16-Bit
16-Bits
32-bit
Am29300
WF024770
WF024780
ScansUX970
AM29331GC
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PDF
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AM29C323
Abstract: AM29C323GC A7 p25 T14X3 CGX169 Y0-Y31 32x32 Multiplier 65A15 PW1232 32-bit adder
Text: Am29C323 CMOS 32-Bit Parallel Multiplier PRELIMINARY • • • • • 32-Bit Three-Bus Architecture - The device has tw o 32-bit input ports and one 32-bit output port with clocked multiply time of 100 ns Speed Selects - 80- and 55-ns speed-select parts
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Am29C323
32-Bit
55-ns
WF022960
WF022990
AM29C323GC
A7 p25
T14X3
CGX169
Y0-Y31
32x32 Multiplier
65A15
PW1232
32-bit adder
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PDF
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AM29C10
Abstract: No abstract text available
Text: Am29C332 CM O S 32-Bit Arithmetic Logic Unit ADVANCE INFO R M ATIO N Single Chip, 32-B it ALU Standard product supports 110 ns microcycle time for th e 32-bit data path. It is a com binatorial ALU with equal cycle tim e for all instructions. Speed S elect supports 80-ns system cycle tim e
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Am29C332
32-Bit
80-ns
WF023691
F023700
AM29C10
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PDF
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Wiring Diagram ford s max
Abstract: Wiring Diagram ford c max Am29C332 am29c334 modified booth circuit diagram K1599 am29338 D622 D820 DA11
Text: Am29C332 CMOS 32-Bit Arithmetic Logic Unit ADVANCE INFORMATION • • • Single Chip, 32-Bit ALU Standard product supports 110 ns microcycle time for the 32-bit data path. It is a combinatorial ALU with equal cycle time for all instructions. Speed Select supports 80-ns system cycle time
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Am29C332
32-Bit
80-ns
64-Bit
WF023691
Wiring Diagram ford s max
Wiring Diagram ford c max
am29c334
modified booth circuit diagram
K1599
am29338
D622
D820
DA11
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PDF
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H-14
Abstract: L-13 WF023740 ScansUX971 Am29C325
Text: Am29C325 CMOS 32-Bit Floating-Point Processor ADVANCE INFORMATION DISTINCTIVE CHARACTERISTICS • • Single VLSI device performs high-speed floating-point arithmetic - Floating-point addition, subtraction, and multiplication in a single clock cycle - Internal architecture supports sum-of-products,
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Am29C325
32-Bit
32-bit,
16-bit
Am29325
WF023760
WF023790
WF023800
H-14
L-13
WF023740
ScansUX971
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PDF
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b09 n03
Abstract: A09 N03 YA11 D803 yb05 L0722 L0623 k0312 apl 117 YA16
Text: Am29C334 CMOS Four-Port Dual-Access Register File PRELIMINARY 64 x 18 Bit Wide Register File The Am29C334 is a 64 x 18-bit, dual-access RAM with two read ports and two write ports. Pipelined Data Path The Am29C334 can be configured to support either a non-pipelined data path similar to the Am29334 or a
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Am29C334
18-bit,
Am29334
Am29C332
32-bit
KS000010
b09 n03
A09 N03
YA11
D803
yb05
L0722
L0623
k0312
apl 117
YA16
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PDF
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AM2930
Abstract: AM29C33 AM29300 SP-08 89 AM29331A
Text: Am29331 16-Bit Microprogram Sequencer • • • • B reak-Point Logic Built-in address com parator allows break-points in the microcode for debugging and statistics collection. M a ste r/S lav e Error Checking Two sequencers can operate in parallel as a m aster
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Am29331
16-Bit
16-Bits
32-bit
Am29300
WF025100
WF024770
AM2930
AM29C33
SP-08 89
AM29331A
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PDF
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modified booth circuit diagram
Abstract: mps 0814 D829 Modified Booth Multipliers 0A31 DA10 functional diagram of ALU 32 bit booth multiplier for fixed point Booth Multiplier encoder multiplexer d8297
Text: Am29332 3 2-B it Arithm etic Logic Unit • • • Supports All Data Types It supports one-, two-, three- and four-byte data for all operations and variable-length fields for logical operations. Multiply and Divide Support Built-in hardware to support tw o-bit-at-a-tim e m odi
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Am29332
32-Bit
64-Bit
wf023691
DA0-DA31,
modified booth circuit diagram
mps 0814
D829
Modified Booth Multipliers
0A31
DA10
functional diagram of ALU
32 bit booth multiplier for fixed point
Booth Multiplier encoder multiplexer
d8297
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PDF
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Am29C323
Abstract: 07B30 Am29C323-2 AM29C516
Text: Am29C323 CMOS 32-Bit Parallel Multiplier PRELIMINARY Registers can be m ade transparent - Input and output registers can be made transparent independently to elim inate unwanted pipeline delay Supports T w o ’s Com plem ent, Unsigned or Mixed Num bers D ata Integrity Through M aster-Slave M ode and Pari
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Am29C323
32-Bit
32-Blt
55-ns
29C323
IC000870
07B30
Am29C323-2
AM29C516
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PDF
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5N520
Abstract: ScansUX971 AL576 Y746
Text: Am29C331 CMOS 16-Bit Microprogram Sequencer PRELIMINARY • • • • 16-Bits Address up to 64K Words Supports 110-ns microcycle time for a 32-bit highperformance system when used with the other members of the Am29C300 Family. Speed Select Supports 80-ns system cycle time.
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Am29C331
16-Bit
16-Bits
110-ns
32-bit
Am29C300
80-ns
wf024770
wf025320
Am29331
5N520
ScansUX971
AL576
Y746
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PDF
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Wiring Diagram ford s max
Abstract: Wiring Diagram ford c max 0B2S applications for modified booth algorithm TTL116 AM29332A DA11 DS12 8 bit booth multiplier 64 bit booth multiplier
Text: Am29332 32-Bit Arithmetic Logic Unit Single Chip, 32-B it ALU S upports 8 0 -9 0 ns m icrocycle tim e for the 32-bit data path. It is a com binatorial ALU with equal cy cle tim e fo r all instructions. Flow-through A rchitecture A com binatorial ALU with tw o input data ports and
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OCR Scan
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Am29332
32-Bit
64-Bit
WF023680
DAo-DA31,
Wiring Diagram ford s max
Wiring Diagram ford c max
0B2S
applications for modified booth algorithm
TTL116
AM29332A
DA11
DS12
8 bit booth multiplier
64 bit booth multiplier
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PDF
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am29338
Abstract: ECL86 ECL 86 DG Y27 D2259 D1796 D2110-4 ScansUX970 am29c332
Text: Am29338 32-Bit Byte Queue ADVANCE INFORMATION Asynchronous and Synchronous Operation - Supports communication between systems with differ ent clocks and different bus widths Retransm it - Data can be read out repeatedly Horizontal Cascading - Up to four devices allow simultaneous input or output
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32-Bit
WF023460
y0-31/
WF023471
WFR02990
ICR00480
am29338
ECL86
ECL 86
DG Y27
D2259
D1796
D2110-4
ScansUX970
am29c332
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PDF
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