Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
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SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
SNS74LVC2G53
scyb014
scyb005
scym001
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Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
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SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
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LCV112A
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289I – JANUARY 1993 – REVISED MARCH 2002 D D D D D D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Inputs Accept Voltages to 5.5 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
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SN74LVC112A
SCAS289I
000-V
A114-A)
A115-A)
LCV112A
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Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
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SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
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SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
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LC112A
Abstract: LVC112A A115-A C101 SN74LVC112A SN74LVC112AD
Text: SN74LVC112A DUAL NEGATIVEĆEDGEĆTRIGGERED JĆK FLIPĆFLOP WITH CLEAR AND PRESET SCAS289K − JANUARY 1993 − REVISED OCTOBER 2003 D D D D D D D D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 4.8 ns at 3.3 V
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SN74LVC112A
SCAS289K
000-V
A114-A)
A115-A)
LC112A
LVC112A
A115-A
C101
SN74LVC112A
SN74LVC112AD
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Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
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SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
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SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
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A115-A
Abstract: C101 SN74LVC112A SN74LVC112AD LC112 CPD14
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
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SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
A115-A
C101
SN74LVC112A
SN74LVC112AD
LC112
CPD14
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SN74LVC112A
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289H – JANUARY 1993 – REVISED JUNE 2000 D D D D D D D EPIC Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
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SN74LVC112A
SCAS289H
MIL-STD-883,
SN74LVC112A
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SN74LVC112A
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289B – JANUARY 1993 – REVISED SEPTEMBER 1996 D D D D D EPIC Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
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SN74LVC112A
SCAS289B
SN74LVC112A
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Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
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SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
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SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
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A115-A
Abstract: C101 SN74LVC112A SN74LVC112AD LC112A
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289K – JANUARY 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
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SN74LVC112A
SCAS289K
000-V
A114-A)
A115-A)
A115-A
C101
SN74LVC112A
SN74LVC112AD
LC112A
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SN74LVC112A
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289D – JANUARY 1993 – REVISED JANUARY 1997 D D D D D D D EPIC Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V
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SN74LVC112A
SCAS289D
MIL-STD-883,
JESD-17
SN74LVC112A
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A115-A
Abstract: C101 SN74LVC112A SN74LVC112AD LC112A
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289J – JANUARY 1993 – REVISED AUGUST 2002 D D D D D D D D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 4.8 ns at 3.3 V
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SN74LVC112A
SCAS289J
000-V
A114-A)
A115-A)
A115-A
C101
SN74LVC112A
SN74LVC112AD
LC112A
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LC112A
Abstract: A115-A C101 SN74LVC112A SN74LVC112AD
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
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SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
LC112A
A115-A
C101
SN74LVC112A
SN74LVC112AD
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Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
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SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289J – JANUARY 1993 – REVISED AUGUST 2002 D D D D D D D D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 4.8 ns at 3.3 V
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SN74LVC112A
SCAS289J
000-V
A114-A)
A115-A)
SN74LVC112APWR
SN74LVC112A
SCEM012,
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Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVEĆEDGEĆTRIGGERED JĆK FLIPĆFLOP WITH CLEAR AND PRESET SCAS289K − JANUARY 1993 − REVISED OCTOBER 2003 D D D D D D D D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 4.8 ns at 3.3 V
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SN74LVC112A
SCAS289K
000-V
A114-A)
A115-A)
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SN74LVC112
Abstract: A115-A C101 SN74LVC112A SN74LVC112AD
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
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SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
SN74LVC112
A115-A
C101
SN74LVC112A
SN74LVC112AD
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H723
Abstract: No abstract text available
Text: SN74LVC112 DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289 - JANUARY 1993 - REVISED MARCH 1994 EPIC Enhanced-Performance Implanted CMOS S'übmicron Process Typical V q lp (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C
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SN74LVC112
SCAS289
-100MA
IOH--12mA
H723
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Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED Ü-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289E - JANUARY 1 9 9 3 - REVISED JANUARY 1996 • • • • "IToIfo R PACKAGE TOP VIEW EPICrM(Enhanced-Performance Implanted CMOS) Submicron Process ESD Protection Exceeds 2000 V Per
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SN74LVC112A
SCAS289E
MIL-STD-883,
JESD17
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SN74LVC112A
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289D - JANUARY 1993 - REVISED JANUARY 1997 • • • • • • • EPIC Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V
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SN74LVC112A
SCAS289D
MIL-STD-883,
JESD-17
1til723
SN74LVC112A
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