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    Microchip Technology Inc A54SX16P-TQ144

    IC FPGA 113 I/O 144TQFP
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    Microchip Technology Inc A54SX16P-VQ100

    IC FPGA 81 I/O 100VQFP
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    Microchip Technology Inc A54SX16P-1VQ100

    IC FPGA 81 I/O 100VQFP
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    Microchip Technology Inc A54SX16P-TQ144I

    IC FPGA 113 I/O 144TQFP
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    Microchip Technology Inc A54SX16P-2TQ144

    IC FPGA 113 I/O 144TQFP
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    A54SX16P Datasheets (388)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    A54SX16P-1 Actel 54SX Family FPGAs Original PDF
    A54SX16P-1BG208 Actel 54SX Family FPGAs Original PDF
    A54SX16P-1BG208I Actel 54SX Family FPGAs Original PDF
    A54SX16P-1BG208M Actel 54SX Family FPGAs Original PDF
    A54SX16P-1BG208PP Actel 54SX Family FPGAs Original PDF
    A54SX16P-1FG208 Actel 54SX Family FPGAs Original PDF
    A54SX16P-1FG208I Actel 54SX Family FPGAs Original PDF
    A54SX16P-1FG208M Actel 54SX Family FPGAs Original PDF
    A54SX16P-1FG208PP Actel 54SX Family FPGAs Original PDF
    A54SX16P-1PL208 Actel 54SX Family FPGAs Original PDF
    A54SX16P-1PL208I Actel 54SX Family FPGAs Original PDF
    A54SX16P-1PL208M Actel 54SX Family FPGAs Original PDF
    A54SX16P-1PL208PP Actel 54SX Family FPGAs Original PDF
    A54SX16P-1PQ208 Actel SXA FPGA 16K System Gates Original PDF
    A54SX16P-1PQ208 Actel FPGA Original PDF
    A54SX16P-1PQ208 Actel 54SX Family FPGAs Original PDF
    A54SX16P-1PQ208 Actel Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 175 I/O 208PQFP Original PDF
    A54SX16P-1PQ208I Actel SXA FPGA 16K System Gates Original PDF
    A54SX16P-1PQ208I Actel 54SX Family FPGAs Original PDF
    A54SX16P-1PQ208I Actel FPGA Original PDF
    ...

    A54SX16P Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    actel cqfp 84

    Abstract: A1010B ACTEL FBGA 144
    Text: v3.0 Package Options: User I/Os per Package C om m e r c i a l / I nd us t r i a l D ev i c e s A54SX16 A54SX16P A54SX32 130 175 175 174 81 81 81 A54SX08 A54SX72A SX A54SX32A A54SX16A 44 A54SX08A PLCC SX-A eX256 Pins eX128 Package eX64 eX 68 84 PQFP 69 100


    Original     		PDF A54SX08A A54SX16A A54SX32A A54SX72A A54SX08 A54SX16 A54SX16P A54SX32 eX128 eX256 actel cqfp 84 A1010B ACTEL FBGA 144

    Untitled

    Abstract: No abstract text available
    Text: v3.2 SX Family FPGAs u e Leading Edge Performance • • • • Features 320 MHz Internal Performance 3.7 ns Clock-to-Out Pin-to-Pin 0.1 ns Input Setup 0.25 ns Clock Skew • • • • • • • • Specifications • • • • 12,000 to 48,000 System Gates


    Original     		PDF

    CQFP 256 PIN actel

    Abstract: No abstract text available
    Text: Pr el i mi nar y v 1. 3 54SX Family FPGAs RadTolerant and HiRel Features • 100% Resource Utilization with 100% Pin Locking RadTolerant 54SX Family • Mixed Voltage Support—3.3V Operation with 5.0V Input Tolerance • Tested Total Ionizing Dose TID Survivability Level


    Original     		PDF

    vhdl code for motor speed control

    Abstract: ANTIFUSE
    Text: Actel’s Antifuse FPGAs Programmable ASIC Solutions Space Electronics Communications Infrastructure e-Appliances The Antifuse Advantage Actel’s antifuse devices are low-cost, high-performance solutions for today’s logic designer. Ideal for integrating logic typically implemented in multiple CPLDs, PALs,


    Original     		PDF

    THERMAL Fuse m20 tf 115 c

    Abstract: 54SX A54SX08 A54SX16 A54SX32 PAR64 REQ64 circuit diagram of motherboard W2-081 ac 171
    Text: v3.1 54SX Family FPGAs Le a di ng E dg e P er f or m a nc e F ea t u r es • 320 MHz Internal Performance • 66 MHz PCI • 3.7 ns Clock-to-Out Pin-to-Pin • CPLD and FPGA Integration • 0.1 ns Input Set-Up • Single Chip Solution • 0.25 ns Clock Skew


    Original     		PDF

    RTAX2000

    Abstract: ProASIC3 A3P250 RTAX1000S A3P125 A54SX16A A54SX32A APA075 AX125 PAR64 RTAX250S
    Text: CorePCI v5.41 Product Summary Synthesis and Simulation Support Intended Use • Most Flexible High-Performance PCI Offering – Synthesis: ExemplarTM, Synopsys DC / FPGA CompilerTM, and Synplicity® • Simulation: Vital-Compliant VHDL Simulators and OVI- Compliant Verilog Simulators


    Original     		PDF 32-Bit 64-Bit RTAX2000 ProASIC3 A3P250 RTAX1000S A3P125 A54SX16A A54SX32A APA075 AX125 PAR64 RTAX250S

    AC201

    Abstract: A54SX72* radiation Synplify tmr fpga radiation A54SX08 A54SX08A A54SX16 A54SX16A A54SX32A AX125
    Text: Application Note AC201 Maximizing Logic Utilization in eX, SX, SX-A, and Axcelerator FPGA Devices Using CC Macros Introduction Typically, designers use logic optimization techniques to minimize logic resources, allowing the design to fit into a specific field-programmable gate array FPGA . This application note introduces an optimization


    Original     		PDF AC201 AC201 A54SX72* radiation Synplify tmr fpga radiation A54SX08 A54SX08A A54SX16 A54SX16A A54SX32A AX125

    QFN108

    Abstract: QFN-132 kl1-v1 208 pin rqfp drawing qfn132 RT3PE3000L CQ256 DIMENSIONS pqfp 100 actel package mechanical drawing Actel A40MX04 PBGA 23X23 0.8 pitch
    Text: v 11. 2 Package Mechanical Drawings Ceramic Pin Grid Array 84-Pin CPGA Top View 0.050" ± 0.010" Pin #1 ID 0.045" 0.055" 0.015" 0.018" ± 0.002" 0.100" BSC 1.100" ± 0.020" square 0.072" 0.088" L 0.120" 0.140" Side View K J H G F 1.000" BSC E D C B A 1 2 3


    Original     		PDF 84-Pin A1010B A1020B 100-Pin QFN108 QFN-132 kl1-v1 208 pin rqfp drawing qfn132 RT3PE3000L CQ256 DIMENSIONS pqfp 100 actel package mechanical drawing Actel A40MX04 PBGA 23X23 0.8 pitch

    ACTEL

    Abstract: A54SX32 errata
    Text: Errata v2.0 54SX Family FPGAs Errata In Table 1 on page 8, the supply voltage is incorrect. Here is how the table should appear. A54SX16-P has three different entries because it is capable of both a 3.3V and a 5V drive. Table 1 • Supply Voltages VCCA VCCI


    Original     		PDF A54SX16-P A54SX08 A54SX16 A54SX32 A54SX16-P 5172137E-3/3 ACTEL A54SX32 errata

    sx08a

    Abstract: RTSX16
    Text: Application Note Hot-Swappable Capabilities of Actel’s SX-A and SX FPGAs Introduction Hot-Swappable-Tolerant Classification AA There is an increasing demand in the industry for systems to stay on-line during maintenance. System designers require devices to be operational when inserted or removed from


    Original     		PDF

    Actel a1280

    Abstract: BP-1710 ACTEL A1010 rt1280 ACTEL A1010A Silicon Sculptor II bp1710 RT54SX72SU Actel A1020 Actel a1225xl
    Text: Application Note AC225 Programming Antifuse Devices Introduction This document provides an overview of the various programming options available for the Actel antifuse families. In addition, it provides helpful information relating to programming failures, including measures


    Original     		PDF AC225 Actel a1280 BP-1710 ACTEL A1010 rt1280 ACTEL A1010A Silicon Sculptor II bp1710 RT54SX72SU Actel A1020 Actel a1225xl

    RT54SX72SCQ208

    Abstract: A42MX16 RT54SX32S-CQ208 CQ208 CQ256
    Text: v3.0 Component Selector Guide PCI 5.0 Volt Tolerant — 5 Volt I/O — Yes Yes Yes — — Yes 3.3 Volt I/O 3,000 2.5 Volt I/O Gates 36 JTAG I/O User I/O C, I SRAM Bits Screening –F, Std, –P Wide Decodes Speed Grade CS49 Flip-Flops/Dedicated Max Package


    Original     		PDF CS128 TQ100 eX128 eX256 CS180 A54SX08A RT54SX72SCQ208 A42MX16 RT54SX32S-CQ208 CQ208 CQ256

    Untitled

    Abstract: No abstract text available
    Text: v3.0 CorePCI Target 33/66 MHz Pr od u c t S u mm a ry Version Intended Use This data sheet defines the functionality of Version 5.1 of the CorePCI macro. • High-Performance PCI Target Applications – 32/64-Bit, 66MHz, 3.3V Section – 32/64-Bit, 33MHz, 5V or 3.3V


    Original     		PDF 32/64-Bit, 66MHz, 33MHz,

    A54SXA

    Abstract: A54SX-A PD30111 A54SX16A
    Text: v3.0 CorePCI Target, Master, and Master/Target Pr od uc t S um m ary In t e n d e d U s e • High-Performance PCI Applications Mac ro Ve ri fica ti on and Com p li ance • Actel-Developed Test Bench • Hardware Tested – Target, Master, and Master/Target, which includes


    Original     		PDF 32-Bit 64-Bit A54SXA A54SX-A PD30111 A54SX16A

    Untitled

    Abstract: No abstract text available
    Text: 54SXFamily FPGAs Leadi ng Edge P e r f o r m a nc e • • 320 MHz Internal Performance • 3.3VOperation with 5.0YInput Tolerance • 3.7 ns Qock-to-Out Pin-to-Pin • • 0.1ns Input Set-Up • Deterministic, Ufcer-Controllable Timing • 0.25 ns d o c k Skew


    OCR Scan     		PDF 54SXFamily

    ACTEL BGA329

    Abstract: LRD12 54SX A54SX08 A54SX16 A54SX32 PAR64 REQ64 LRD-12 A54SX16P PQFP
    Text: -m e te f v 3 .0 - m 54SX Fami ly FPGAs Leadi ng Edge P e r f o r m a n c e • • 320 MHz Internal Performance • 3.3VOperation with 5.0YInput Tolerance • 3.7 ns Qock-toOut Pin-to-Pin • \fcry Low Power Consumption


    OCR Scan     		PDF PBGA313 PBGA329 ACTEL BGA329 LRD12 54SX A54SX08 A54SX16 A54SX32 PAR64 REQ64 LRD-12 A54SX16P PQFP

    Untitled

    Abstract: No abstract text available
    Text: P r e l i m i n a r y v 1 .3 54SXFamily FPGAs RadTolerant and HiRcl Features • 100%Resource Utilization with 100%Pin Locking R a d T o l e r a n t 5 4 S X F am i l y • Mxed Voltage Support— 3.3VOperation with 5.0VInput Tolerance • Tested Total IonizingDose TID Survivability Level


    OCR Scan     		PDF 54SXFamily

    Untitled

    Abstract: No abstract text available
    Text: 54SX Family FPGAs RadTolerant and HiRel Features R a d T ole ran t 54SX Family • • • • • TestedTotal Ionizing Dose TID Survivability Level Devices Avail able from Tested Lots Radiation Performance to 100K Rads Up to 160 MHz On-Chip Performance


    OCR Scan     		PDF CQ208 CQ256

    b23n20

    Abstract: No abstract text available
    Text: ^ c te -m v 2. 0 l 54SX Family FPGAs • • • • • 100%Resource Utilization with 100%Pin Locking 3.3VOperation with 5.0VInput Tolerance Very Low Power Consumption Deterministic, User-ControlIableTiming Unique, In-System Diagnostic and Debug capability with


    OCR Scan     		PDF 0001o A54SX08 PBGA313 PBGA329 b23n20

    k16 a21

    Abstract: 313-pin
    Text: ^ c M J P relim inary • v 1 .1 54SX Family FPGAs Features • 3.3VOperation with 5.0VInput Tolerance Hi gh P e r f o r m ance • Low Power Consumption • 320 MHz Internal Performance • Deterministic, User-ControlIableTiming • 4.0 nsClock-to-Out Pi n-to-Pi n


    OCR Scan     		PDF

    THERMAL Fuse m20 tf 115 c

    Abstract: 54SX16A actel fpga 54sx32 54SX32
    Text: ^ c te l v 2 .0 54SX Family FPGAs L ea d in g Edge Pe rform an ce • 100% Resource Utilization with 100%Pin Locking • 320 MHz Internal Performance • 3.3V Operation with 5.0V Input Tolerance • 3.7 ns Clock-to-Out Pm-to-Pin • Very Low Power Consumption


    OCR Scan     		PDF AS4SX32 THERMAL Fuse m20 tf 115 c 54SX16A actel fpga 54sx32 54SX32

    6 pins IC cbe

    Abstract: No abstract text available
    Text: Æ c fe / -m v 2 .0 CorePCI Target 33/66 MHz P ro d u ct S um m ary In te n d e d U s e • High-Performance PCI Target Applications - 32-Bit, 66MHz. 3.3V - 32-Bit, 33MHz, 5V or 3.3V • Back-End Support for Synchronous DRAM, I/O


    OCR Scan     		PDF 32-Bit, 66MHz. 33MHz, 32-Bit 6 pins IC cbe

    Untitled

    Abstract: No abstract text available
    Text: W ie te l Preüminary - m v1 . 2 54SXFamily FPGAs RadTolerant and HiRcl Features • 100%Resource Utilization with 100%Pin Locking R a d T o l e r a n t 5 4 S X F am i l y • Mxed Voltage Support— 3.3VOperation with 5.0VInput


    OCR Scan     		PDF 54SXFamily CQ208

    ird8

    Abstract: LRD12 54SX32 ic tny 176 TNY 227 TNY 251
    Text: ^ c te l P re lim in a ry v l.1 54SX Family FPGAs RadTolerant and HiRel F e a tu re s R a d T o le r a n t 5 4 S X F a m ily • • • • • Tested Total Ionizing Dose TID Survivability Level Devices Available from Tested Lots Radiation Performance to 100K Rads


    OCR Scan     		PDF