CY7C386A-1AC
Abstract: CY7C386A-0AC 7C385A CY7C385A-2AC
Text: CY7C385A 7C386A Very High Speed 4K 12K Gate CMOS FPGA Features D Very high speed D D D D D Ċ Loadable counter frequencies greater than 150 MHz Ċ ChipĆtoĆchip operating frequencies up to 110 MHz Ċ Input + logic cell + output delays under 6 ns Unparalleled FPGA performance for
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CY7C385A
CY7C386A
84pin
100pin
144pin
160pin
16bit
CY7C386A-1AC
CY7C386A-0AC
7C385A
CY7C385A-2AC
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Untitled
Abstract: No abstract text available
Text: Revision: Thursday, September 24,1992 MUR 23 1993 PRELIMINARY CYPRESS s7-W '" SEMICONDUCTOR Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz — Input + logic cell + output delays
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16-bit
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CM4081
Abstract: CY7C385A-1AI CY7C385A CY7C386A
Text: CY7C385A 7C386A CYPRESS Very High Speed 4K 12K Gate CMOS FPGA — Fast, fully automatic place and route — Waveform simulation with back an notated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of
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CY7C385A
CY7C386A
84-pin
100-pin
144-pin
145-pin
160-pin
16-bit
CY7C386Aâ
CM4081
CY7C385A-1AI
CY7C386A
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qml-38535
Abstract: smd marking mxc ASTM F1192M-95 5962-9559903MXC SC-117 JEDEC
Text: REVISIONS LTR DESCRIPTION A Removed vendor 65786, added vendor 0W GG6. Changed number of devices tested in O/V latch-up test from 5 to 3. Changed Table 1, ICC from 10 mA to 20 mA. Added footnote Table I, for Dynamic Dower, ksr B DATE (YR-MO-DA) Added case Y to cover D in arid arrav Dackaae. Editorial chanaes
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QL16X24B-1CG144M/883C
qml-38535
smd marking mxc
ASTM F1192M-95
5962-9559903MXC
SC-117 JEDEC
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C3807 equivalent
Abstract: No abstract text available
Text: PRELIMINARY r-’vpprcq SEMICONDUCTOR Very High Speed CMOS FPGAs • Input hysteresis provides high noise immunity • Thorough testability — Built-in scan path permits 100 per cent factory testing of logic and I/O cells — Automatic Test Vector Generation
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pASIC380
pASIC380
C3807 equivalent
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Untitled
Abstract: No abstract text available
Text: CY7C385A 7C386A i f CYPRESS Very High Speed 4K 12K Gate CMOS FPGA — Fast, fully automatic place and route — Waveform simulation with back an notated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of
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CY7C385A
CY7C386A
84-pin
100-pin
144-pin
145-pin
160-pin
16-bit
160-Lead
7C386A
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programmer manual EPLD cypress
Abstract: No abstract text available
Text: l l lt fM d l l l t? . I U t? 5 U d y , M U y U 5 > l I I , ItKfcS Revision: Tuesday, June 28,1994 pASIC380 Family F/ CYPRESS Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz
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pASIC380
16-bit
0014L22
programmer manual EPLD cypress
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Untitled
Abstract: No abstract text available
Text: ADVANCED INFORMATION CYPRESS SEMICONDUCTOR Features • — PC an d w ork station p latform s — L oad ab le co u n ter freq u en cies grea ter th an 100 M H z • — Inp u t + logic cell + o u tp u t d elays u n d er 9 n s • U n p a ra lleled FP G A p erform an ce for
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CY7C385A
CY7C386A
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Untitled
Abstract: No abstract text available
Text: m e iid iiitu v iu iiu ciy , ü u iiü io , i» » £ Revision: Tuesday, May 10,1994 CY7C385A 7C386A CYPRESS Features • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies up to 85 MHz — Input + logic cell + output delays
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CY7C385A
CY7C386A
7C385A)
7C386A)
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btd 41
Abstract: 160LEAD CPGA schematics
Text: CY7C385A 7C386A ^ CYPRESS Very High Speed 4K 12K Gate CMOS FPGA — Fast, fully automatic place and route — Waveform simulation with back an notated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of
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OCR Scan
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PDF
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CY7C385A
CY7C386A
84-pin
100-pin
144-pin
145-pin
160-pin
16-bit
CY7C386Aâ
btd 41
160LEAD
CPGA schematics
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