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    7C342B Price and Stock

    Teledyne e2v CY7C342B-20HMB

    CPLD, UV ERASABLE, 128-MACROCELL, 20 NS - Trays (Alt: CY7C342B-20HMB)
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    Avnet Americas CY7C342B-20HMB Tray 250
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    Teledyne e2v CY7C342B-15HMB

    CPLD, UV ERASABLE, 128-MACROCELL, 15 NS - Trays (Alt: CY7C342B-15HMB)
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    Teledyne e2v CY7C342B-35HMB

    CPLD, UV ERASABLE, 128-MACROCELL, 35 NS - Trays (Alt: CY7C342B-35HMB)
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    Teledyne e2v CY7C342B-35JI

    CPLD, OTP, 128-MACROCELL, 35 NS, INDUST - Rail/Tube (Alt: CY7C342B-35JI)
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    Avnet Americas CY7C342B-35JI Tube 500
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    Teledyne e2v CY7C342B-15RMB

    CPLD, UV ERASABLE, 128-MACROCELL, 15 NS - Trays (Alt: CY7C342B-15RMB)
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    7C342B Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    7C342B

    Abstract: 68-PIN CY7C342B k941
    Text: 7C342B:11/91 Revision: July 19, 2000 7C342B 128-Macrocell MAX EPLD Features The 128 macrocells in the 7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB.


    Original     		PDF 7C342B CY7C342B 128-Macrocell CY7C342B 65-micron 68-pin k941

    74151

    Abstract: 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer
    Text: 1CY 7C34 0 fax id: 6100 EPL D Family CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDS Features tion of innovative architecture and state-of-the-art process, the MAX EPLDs offer LSI density without sacrificing speed. • Erasable, user-configurable CMOS EPLDs capable of


    Original     		PDF CY7C340 CY7C34X) 65-micron CY7C34XB) 74151 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer

    C3402

    Abstract: 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C CY7C340
    Text: EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase


    Original     		PDF CY7C340 CY7C34X) 65-micron CY7C34XB) C3402 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C

    ATPA

    Abstract: 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c
    Text: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2147-35C CY7C147-35C CY7C147-45C CY7C147-35C CY91L22-35C CY7C122-35C CY2147-45C CY2147-35C CY7C148-35C CY7C148-25C+ CY91L22-45C CY93L422AC CY2147-45C CY7C147-45C CY7C148-45C CY7C148-35C


    Original     		PDF CY2147-35C CY7C147-35C CY7C147-45C CY91L22-35C CY7C122-35C CY2147-45C CY7C148-35C CY7C148-25C+ ATPA 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c

    81c78

    Abstract: 7C291 5962-8515505RX 27PC256-12 PAL164A 8464C 5C6408 72018 39C10B MACH110 cross reference
    Text: Product Line Cross Reference CYPRESS 2147-35C 2147-45C 2147-45C 2147-45M+ 2147-55C 2147-55M 2148-35C 2148-35C 2148-35M 2148-45C 2148-45C 2148-45M 2148-45M+ 2148-55C 2148-55C 2148-55M 2149-35C 2149-35C 2149-35M 2149-45C 2149-45M 2149-45M 2149-55C 2149-55C 2149-55M


    Original     		PDF 2147-35C 2147-45C 2147-45M+ 2147-55C 2147-55M 2148-35C 2148-35M 2148-45C 81c78 7C291 5962-8515505RX 27PC256-12 PAL164A 8464C 5C6408 72018 39C10B MACH110 cross reference

    68-PIN

    Abstract: CY7C342B ULTRA37000TM CY7C342B-30JC
    Text: USE ULTRA37000TM FOR ALL NEW DESIGNS 7C342B 128-Macrocell MAX EPLD Features 100% user-configurable, allowing the device to accommodate a variety of independent logic functions. • 128 macrocells in eight logic array blocks LABs The 128 macrocells in the 7C342B are divided into eight


    Original     		PDF ULTRA37000TM CY7C342B 128-Macrocell CY7C342B 65-micron 68-pin CY7C342B-30JC

    MSM 6290

    Abstract: msm 5562 27c256 intel 62c512 AP 2068 27C512 microchip 62256 57C256 27C512 SGS-THOMSON 27C512-150
    Text: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 2147-35C 27S07AC 7C190-25C 7C171A-35C 7C171A-25C 2147-45C 7C147-45C 27S07AM 7C190-25M 7C171A-45M 7C171A-35M+ 2147-45M+


    Original     		PDF 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 27S07AC 7C190-25C MSM 6290 msm 5562 27c256 intel 62c512 AP 2068 27C512 microchip 62256 57C256 27C512 SGS-THOMSON 27C512-150

    68-PIN

    Abstract: CY7C342B
    Text: 42B 7C342B 128-Macrocell MAX EPLD Features The 128 macrocells in the 7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB. • • •


    Original     		PDF CY7C342B 128-Macrocell CY7C342B 65-micron 68-pin

    74151 PIN DIAGRAM

    Abstract: 74151 22v10 5192JM CY7C340 PRODUCT CHANGE PALC22V10B programmer EPLD CY7C340 CY7C341B CY7C342B
    Text: 40 EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase


    Original     		PDF CY7C340 CY7C34X) 65-micron CY7C34XB) 74151 PIN DIAGRAM 74151 22v10 5192JM CY7C340 PRODUCT CHANGE PALC22V10B programmer EPLD CY7C341B CY7C342B

    tag l9 225 400

    Abstract: TAG B6 CY7C342B H-81
    Text: 7c342: 11-4-91 Revision: October 19, 1995 7C342B 128ĆMacrocell MAXR EPLDs Features D 128 macrocells in 8 LABs D 8 dedicated inputs, 52 bidirectional The 7C342B is an Erasable ProgramĆ mable Logic Device EPLD in which CMOS EPROM cells are used to configure


    Original     		PDF 7c342: CY7C342B 128Macrocell CY7C342B 65micron tag l9 225 400 TAG B6 H-81

    CY7C342B

    Abstract: 68-PIN CY7C342B-35RMB
    Text: fax id: 6107 1CY 7C34 2B 7C342B 128-Macrocell MAX EPLDs Features The 128 macrocells in the 7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB.


    Original     		PDF CY7C342B 128-Macrocell CY7C342B 65-micron 68-pin CY7C342B-35RMB

    k941

    Abstract: 68-PIN CY7C342B ULTRA37000TM
    Text: USE ULTRA37000TM FOR ALL NEW DESIGNS 7C342B 128-Macrocell MAX EPLD Features 100% user-configurable, allowing the device to accommodate a variety of independent logic functions. • 128 macrocells in eight logic array blocks LABs The 128 macrocells in the 7C342B are divided into eight


    Original     		PDF ULTRA37000TM CY7C342B 128-Macrocell CY7C342B 65-micron 68-pin k941

    27HC642

    Abstract: 39C10B PAL22V10APC CY2254SC-1 7132SA70 93L422AM 7024S15 7130SA25 7C198-45C 7006S
    Text: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 2147-35C 27S07AC 7C190-25C 7C171A-35C 7C171A-25C 2147-45C 7C147-45C 27S07AM 7C190-25M 7C171A-45M 7C171A-35M+ 2147-45M+


    Original     		PDF 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 27S07AC 7C190-25C 27HC642 39C10B PAL22V10APC CY2254SC-1 7132SA70 93L422AM 7024S15 7130SA25 7C198-45C 7006S

    CY7C342B

    Abstract: 7C342B-35 68-PIN CY7C342B15HMB CY7C342B-35RMB CY7C342B-35HC
    Text: 1CY 7C34 2B 7C342B 128-Macrocell MAX EPLDs Features The 128 macrocells in the 7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB.


    Original     		PDF CY7C342B 128-Macrocell CY7C342B 65-micron 68-pin 68-Lead 7C342B-35 CY7C342B15HMB CY7C342B-35RMB CY7C342B-35HC

    CY7C342B-25jc

    Abstract: 68-PIN CY7C342B K941
    Text: 7C342B 128-Macrocell MAX EPLD Features The 128 macrocells in the 7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB. • • • •


    Original     		PDF CY7C342B 128-Macrocell CY7C342B 65-micron 68-pin CY7C342B-25jc K941

    31-oq

    Abstract: 7C342-25 CY7C342-35HMB 7C342-35 CY7C342 CY7C342B OQ11
    Text: CY7C342 7C342B rif CYPRESS 128-Macrocell M AX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C342


    OCR Scan     		PDF CY7C342 CY7C342B 128-Macrocell CY7C342) 65-micron CY7C342B) 68-pin CY7C342/CY7C342B CY7C342/ CY7C342B 31-oq 7C342-25 CY7C342-35HMB 7C342-35 OQ11

    C3424

    Abstract: 68-PIN 7C342-30 7C342-35 CY7C342 CY7C342B C3422 CY7C342-30HC CY7C342B-30RMB 30RM
    Text: CY7C342 7C342B CYPRESS 128-Macrocell MAX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C342


    OCR Scan     		PDF CY7C342 CY7C342B 128-Macrocell CY7C342) 65-micron CY7C342B) 68-pin CY7C342/CY7C342B CY7C342/ C3424 7C342-30 7C342-35 C3422 CY7C342-30HC CY7C342B-30RMB 30RM

    7C342C

    Abstract: No abstract text available
    Text: CY7C342 7C342B CYPRESS 128-Macrocell MAX EPLD Features F unctional D escrip tion • The CY7C342/7C342B is an Erasable P rogram m able Logic Device E P L D in which CM O S E P R O M cells are used to configure logic functions w ithin the device. T he M AX architecture is 100% user confi­


    OCR Scan     		PDF CY7C342) 65-micron CY7C342B) 68-pin CY7C342 CY7C342B 128-Macrocell 7C342/CY7C342B 7400-series 7C342C

    Untitled

    Abstract: No abstract text available
    Text: CY7C342 7C342B CYPRESS SEMICONDUCTOR & 128-Macrocell M A X EPLDs Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • Available in 68-pin HLCC, PLCC, PGA, and Flatpack


    OCR Scan     		PDF CY7C342 CY7C342B 128-Macrocell 68-pin CY7C342/CY7C342B CY7C342/ CY7C342B Y7C342B

    Untitled

    Abstract: No abstract text available
    Text: CY7C340 EPLD Family 0 CYPRESS Multiple Array Matrix High-Density EPLDs — VHDL simulation ViewSim Features • Erasable, user-configurable CMOS EPLDs capable o f implementing highdensity custom logic functions • 0.8-micron double-metal CMOS EPROM technology (CY7C34X)


    OCR Scan     		PDF CY7C340 CY7C34X) 65-micron CY7C34XB) 7C342 342-30H 7C342â 35HMB

    Untitled

    Abstract: No abstract text available
    Text: 7C342B S / CYPRESS Features • 128-Macrocell MAX EPLDs m a b lc L ogic D evice E P L D in w h ich C M O S E P R O M c e lls a re u se d to c o n fig u re logic fu n c tio n s w ith in th e d ev ice. T h e M A X a rc h ite c tu re is 100% u s e r c o n fig u r­


    OCR Scan     		PDF 65-micron 68-pin CY7C342B 128-Macrocell CY7C342B

    HR210

    Abstract: No abstract text available
    Text: CY7C342 7C342B CYPRESS 128-Macrocell MAX EPLD Features Functional Description • 128 macrocells in 8 LABs T he CY 7C342/7C342B is an E rasable Program m able Logic Device E P L D in which C M O S E P R O M cells are used to configure logic functions w ithin the device.


    OCR Scan     		PDF CY7C342) 65-micron CY7C342B) 68-pin CY7C342 CY7C342B 128-Macrocell 7C342/CY7C342B 7400-series HR210

    G013G

    Abstract: 05V3 7C342-30 7C342-35 CY7C342 CY7C342B CY7C342-30RMB K941 12J8 CY7C342-35JC
    Text: CY7C342 7C342B ^ CYPRESS 128-Macrocell M AX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C342


    OCR Scan     		PDF CY7C342 CY7C342B 128-Macrocell CY7C342) 65-micron CY7C342B) 68-pin CY7C342/CY7C342B CY7C342/ G013G 05V3 7C342-30 7C342-35 CY7C342-30RMB K941 12J8 CY7C342-35JC

    CY7C342-35RMB

    Abstract: CY7C342-30HC CY7C342 CY7C342B 4s44 CY7C342-30RMB 7C342-30
    Text: fc.SE D CYPRESS SEMICONDUCTOR • SSôTbhE 0D1D4Û0 41Ô * C Y P CY7C342 7C342B :s CYPRESS SEMICONDUCTOR 128-Macrocell MAX EPLDs Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array


    OCR Scan     		PDF CY7C342 CY7C342B 128-Macrocell 68-pin CY7C342/CY7C342B CY7C342/ CY7C342Bâ 25RMB CY7C342-35RMB CY7C342-30HC 4s44 CY7C342-30RMB 7C342-30