HMS3224M3
Abstract: HMS3224Z3
Text: HANBit HMS3224M3/Z3 HAN SRAM MODULE 768KBit 32K x 24-Bit BIT Part No. HMS3224M3, HMS3224Z3 GENERAL DESCRIPTION The HMS3224M3/Z3 is a high-speed static random access memory (SRAM) module containing 32,768 words organized in a x24-bit configuration. The module consists of three 32K x 8 SRAMs mounted on a 56-pin, singlesided, FR4-printed circuit board.
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HMS3224M3/Z3
768KBit
24-Bit)
HMS3224M3,
HMS3224Z3
HMS3224M3/Z3
x24-bit
56-pin,
24bit
HMS3224M3
HMS3224Z3
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STA002
Abstract: STA003T
Text: STA003T MPEG 2.5 LAYER III AUDIO DECODER SINGLE CHIP MPEG2 LAYER 3 DECODER SUPPORTING: - All features specified for Layer III in ISO/IEC 11172-3 MPEG 1 Audio except 44.1KHz Audio - All features specified for Layer III 2 channels in ISO/IEC13818-3.2(MPEG 2 Audio) except
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STA003T
ISO/IEC13818-3
05KHz
025KHz
STA002
STA003T
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Programmable Timer Counter
Abstract: HT82V733 HT86030 HT86070
Text: HT86030/HT86070 Voice Synthesizer 8-Bit MCU Technical Document • Tools Information · FAQs Features · Operating voltage: 2.4V~5.2V · Built-in voice ROM in various capacity · System clock: 4MHz~8MHz · One 8-bit counter with 3-bit prescaler · Crystal or RC oscillator for system clock
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HT86030/HT86070
16-bit
Programmable Timer Counter
HT82V733
HT86030
HT86070
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ic 2822 audio diagram
Abstract: tda 2822 8 pin power amp tda 7456 TDA 2822 tda 2822 smd STA013 74LVX04 CS4331-KS headphone female stereo 7 PIN TDA2822D SMD
Text: AN1090 APPLICATION NOTE STA013 MPEG 2.5 LAYER III SOURCE DECODER by Ruggero DE LUCA This Application Note helps the user to work with STA013 Evaluation Board, installing the PC Software Driver, understanding how STA013 MPEG 2.5 Layer III Source Decoder works, and explaining
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AN1090
STA013
ic 2822 audio diagram
tda 2822 8 pin power amp
tda 7456
TDA 2822
tda 2822 smd
74LVX04
CS4331-KS
headphone female stereo 7 PIN
TDA2822D SMD
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dla001
Abstract: STA013B FC12 B2H18
Text: STA013 STA013B STA013T MPEG 2.5 LAYER III AUDIO DECODER SINGLE CHIP MPEG2 LAYER 3 DECODER SUPPORTING: - All features specified for Layer III in ISO/IEC 11172-3 MPEG 1 Audio - All features specified for Layer III in ISO/IEC 13818-3.2 (MPEG 2 Audio) - Lower sampling frequencies syntax extension,
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STA013
STA013B
STA013T
dla001
FC12
B2H18
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dla001
Abstract: No abstract text available
Text: STA003T MPEG 2.5 LAYER III AUDIO DECODER SINGLE CHIP MPEG2 LAYER 3 DECODER SUPPORTING: - All features specified for Layer III in ISO/IEC 11172-3 MPEG 1 Audio except 44.1KHz Audio - All features specified for Layer III 2 channels in ISO/IEC13818-3.2 (MPEG 2 Audio) except
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STA003T
ISO/IEC13818-3
05KHz
025KHz
STA003T013TR
STA003
dla001
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schmitt trigger using ic 555 timer
Abstract: holtek PRODUCT LABEL
Text: HT83XXX Q-VoiceTM Technical Document • Tools Information · FAQs · Application Note Features · Operating voltage: 2.4V~5.0V · Two 8-bit programmable timer counter with 8-stage prescaler and one time base counter · Up to 1ms 0.5ms instruction cycle with 4MHz (8MHz)
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HT83XXX
14-bit
32-pin
schmitt trigger using ic 555 timer
holtek PRODUCT LABEL
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Untitled
Abstract: No abstract text available
Text: セットアップガイド テーブルリファレンス config コマンドを使って装置のコンフィグレーションをする際にその装置向けシス テムのテーブル情報が必要になります。 本テーブルリファレンスは装置
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FNX0510,
FNX0531,
FNX0532/0532A,
FNX0550/0550A,
FNX0551/0551A
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dla001
Abstract: LFBGA64 STA015 STA015B STA015T TQFP44 STA013 AN-1250 D98AU904
Text: STA015 STA015B STA015T MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM CAPABILITY PRODUCT PREVIEW SINGLE CHIP MPEG2 LAYER 3 DECODER SUPPORTING: - All features specified for Layer III in ISO/IEC 11172-3 MPEG 1 Audio - All features specified for Layer III in ISO/IEC
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STA015
STA015B
STA015T
dla001
LFBGA64
STA015T
TQFP44
STA013
AN-1250
D98AU904
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9489X
Abstract: SDA9400 BGY 702
Text: DATA SHEET MICRONAS SDA 9489X, SDA 9589X High-end Picture-In-Picture ICs Version B31 Edition March 15, 2004 6251-562-1DS MICRONAS SDA 9489X, SDA 9589X DATA SHEET Contents Page Section Title 4 4 6 1. 1.1. 1.2. General Description Features Block Diagram 7 7
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9489X,
9589X
6251-562-1DS
9589X
9489X
SDA9400
BGY 702
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SAM5716
Abstract: No abstract text available
Text: SAM5716 AUDIO & MUSIC MULTI-DSP PROCESSOR Key features Dream DSP Array of 16 new 24bit/56bit DSP cores P24XT supporting 56bit MAC operations (800M MAC/sec), vector processing, double precision instructions and
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SAM5716
24bit/56bit
P24XT)
56bit
48x48bit
16bit
P16XT)
200MHz,
32-bit
512Kword
SAM5716
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SAM5504
Abstract: No abstract text available
Text: SAM5504 AUDIO & MUSIC MULTI-DSP PROCESSOR Key features Dream DSP Array of 4 new 24bit/56bit DSP cores P24XT supporting 56bit MAC operations (200M MAC/sec), vector processing, double precision instructions and
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SAM5504
24bit/56bit
P24XT)
56bit
48x48bit
16bit
P16XT)
200MHz,
32-bit
512Kword
SAM5504
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dla001
Abstract: STA013T TQFP44 STA013 BF10-b2
Text: STA013/STA013T MPEG 2.5 LAYER III AUDIO DECODER SINGLE CHIP MPEG2 LAYER 3 DECODER SUPPORTING: - All features specified for Layer III in ISO/IEC 11172-3 MPEG 1 Audio - All features specified for Layer III in ISO/IEC 13818-3.2 (MPEG 2 Audio) - Lower sampling frequencies syntax extension,
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STA013/STA013T
dla001
STA013T
TQFP44
STA013
BF10-b2
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V850E2NBA85E2S
Abstract: Mictor amp Mictor altera midas V850EP1 fpga Virtex-4 FF1148 Evaluation Board ff1148 RTE-2000H-TP 850e
Text: お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジ が合併し両社の全ての事業が当社に承継されております。従いまして、本資料中には旧社
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A19352JJ1V0UM00
A19352JJ1V0UM
RTE-2000H-TP(
CA850
ID850QB
RTE-2000-TP(
QB-V850MINI
V850E2
V850E2NBA85E2S
Mictor amp
Mictor
altera midas
V850EP1
fpga
Virtex-4 FF1148 Evaluation Board
ff1148
RTE-2000H-TP
850e
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PAL60
Abstract: v2h smd code 437 BGY SDA938 VFP-3 v-chip
Text: PRELIMINARY DATA SHEET SDA 9489X PIP IV Advanced SDA 9589X SOPHISTICUS High-End Picture-In-Picture ICs Edition Feb. 28, 2001 6251-562-1PD SDA 9489X Preliminary Data Sheet SDA 9589X High-end Picture-In-Picture PIP ICs Version 1.3 CMOS General Description
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9489X
9589X
6251-562-1PD
9489X
9589X
PAL60
v2h smd code
437 BGY
SDA938
VFP-3
v-chip
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HT83XXX
Abstract: No abstract text available
Text: HT83XXX Q-VoiceTM Technical Document • Tools Information · FAQs · Application Note Features · Operating voltage: 2.4V~5.2V · Watchdog Timer · Up to 1ms 0.5ms instruction cycle with 4MHz (8MHz) · 4-level subroutine nesting · HALT function and wake-up feature reduce power
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HT83XXX
20-pin
150mil/209mil)
28-pin
300mil)
HT83XXX
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Timer IC 555 to generate clock pulse
Abstract: HT83003 HT83006 HT83009 HT83018 HT83036 HT83048 HT83072 HT83XXX
Text: HT83XXX Q-VoiceTM Preliminary Features • Operating voltage: 2.4V~5.0V · Watchdog Timer · Up to 1ms 0.5ms instruction cycle with 4MHz (8MHz) · 4-level subroutine nesting · HALT function and wake-up feature reduce power system clock · System clock: 4MHz~8MHz (2.4V)
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HT83XXX
32-pin
14-bit
HT83XXX
Timer IC 555 to generate clock pulse
HT83003
HT83006
HT83009
HT83018
HT83036
HT83048
HT83072
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br b2d
Abstract: ST5080 DIP20 LSD23 PLCC28 ST5421 ST5421CFN ST5421CP ST5451 "di code"
Text: ST5421 SID-GCI : S/T INTERFACE DEVICE WITH GCI PRELIMINARY DATA September 1995 PLCC28 ORDERING NUMBERS: ST5421CP ST5421CFN PIN CONNECTIONS Top views FSA LO- LO+ LI+ 4 3 2 1 28 27 26 LI- VCC LSD- DIP20 VCC 5 25 GND N.C. 6 24 GND MCLK/XTAL 7 23 MO XTAL2 8
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ST5421
PLCC28
ST5421CP
ST5421CFN
DIP20
br b2d
ST5080
DIP20
LSD23
PLCC28
ST5421
ST5421CFN
ST5421CP
ST5451
"di code"
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Untitled
Abstract: No abstract text available
Text: JUL : i' V'V SM22432Z September 1991 RevO SMART Modular Technologies SM22432Z 768Kbit 32Kx 24 CMOS Fast SRAM Module General Description Features The SM22432Z is a high performance, 768 kilobit static RAM module organized as 32K words by 24 bits, in a 56-pin, ZIP package. The module utilizes three 32Kx8 high
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SM22432Z
768Kbit
56-pin,
32Kx8
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Untitled
Abstract: No abstract text available
Text: S G S -T H O M S O N ST5421 • y SID-GCI : S/T INTERFACE DEVICE WITH GCI ADVANCE DATA SINGLE CHIP 4 WIRES 192kb/s TRANS CEIVER FULLY COMPLYING WITH CCITT 1.430 ISDN BASIC ACCESS HANDLING 144kb/s 2B + D TRANSMISSION GCI COMPATIBLE INTERCHIP INTERFACE EXCEEDS 1.430 RANGE : AT LEAST 1.5KM
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ST5421
192kb/s
144kb/s
ST5451
ST5421
200kHz
0053bEH
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sgs lb1
Abstract: No abstract text available
Text: RPR a 2 1998 SGS-THOMSON ST5421 SID -G C I : S /T IN TERFA C E D EVIC E W ITH GCI • SINGLE CHIP 4 W IRES 192kb/s TR AN S CEIVER FULLY COM PLYING WITH CCITT 1.430 ■ ISDN BASIC ACCESS HANDLING 144kb/s 2B + D TRANSM ISSIO N ■ GCI CO M PATIBLE INTERCHIP INTERFACE
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ST5421
192kb/s
144kb/s
ST5451
sgs lb1
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Untitled
Abstract: No abstract text available
Text: /= T SGS-THOMSON * 7/ S T 5421 SID-GCI : S/T INTERFACE DEVICE WITH GCI A D V A N C E DATA • SINGLE CHIP 4 W IRES 192kb/s TR ANS CEIVER FULLY CO M PLYING WITH CCITT 1.430 . ISDN BASIC ACCESS HANDLING 144kb/s 2B + D TRANSM ISSIO N ■ GCI COM PATIBLE INTERCHIP INTERFACE
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192kb/s
144kb/s
ST5451
ST5421
ST5421
200kHz
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Untitled
Abstract: No abstract text available
Text: 7 S C S -T H O M S O N iy ST5421 SID-GCI : S/T INTERFACE DEVICE WITH GCI A D V A N C E DATA SINGLE CHIP 4 WIRES 192kb/s TRANS CEIVER FULLY COMPLYING WITH CCITT 1.430 ISDN BASIC ACCESS HANDLING 144kb/s 2B + D TRANSMISSION GCI COMPATIBLE INTERCHIP INTERFACE
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ST5421
192kb/s
144kb/s
ST5451
ST5421
200kHz
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Untitled
Abstract: No abstract text available
Text: APR j- ^ 1931 SM22432Z August 1990 Preliminary SM22432Z 32K X 24 CMOS SRAM Module General Description Features Hie SM22432Z is a high performance, 768 kilobit static RAM module, organized as 32K words by 24 bits, in a 56-pin, zigzag leaded package ZIP . The SM22432Z utilizes three 32K x 8 static
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SM22432Z
768kbit
96KByte
SM22432Z
56-pin,
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