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    7400SERIES TTL Search Results

    7400SERIES TTL Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SNJ5480J Rochester Electronics LLC Adder/Subtractor, TTL, CDIP14, Visit Rochester Electronics LLC Buy
    5480FM Rochester Electronics LLC 5480 - Multiplier, TTL, CDFP14 Visit Rochester Electronics LLC Buy
    9317CDC Rochester Electronics LLC 9317 - Decoder/Driver, TTL, CDIP16 Visit Rochester Electronics LLC Buy
    54H62FM Rochester Electronics LLC 54H62 - Gate, TTL, CDFP14 Visit Rochester Electronics LLC Buy
    5496J/B Rochester Electronics LLC 5496 - Shift Register, 5-Bit, TTL Visit Rochester Electronics LLC Buy

    7400SERIES TTL Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    barcode reader using avr

    Abstract: KEYPAD 4 X 4 verilog KEYPAD verilog rfid reader v6.0 cpld kit verilog keypad scanner cpld keypad encoder schematic ATDS1500PC programmable slew rate control IO
    Text: Programmable Logic and Systems EPLD Family Overview Density 5 V – ATF15xxAS CPLD 3.3 V – ATF15xxASV SPLD ATF22V10C, LVC ATF16V8B/C, LVC ATF750C/LVC Decoders, Glue Logic, can be used to replace a few 7400series TTL 1.8 V – ATF15xxBE State machines, Timing, Control,


    Original     		PDF ATF15xxAS ATF15xxASV ATF22V10C, ATF16V8B/C, ATF750C/LVC 7400series ATF15xxBE ATF15xxBE 32-bit barcode reader using avr KEYPAD 4 X 4 verilog KEYPAD verilog rfid reader v6.0 cpld kit verilog keypad scanner cpld keypad encoder schematic ATDS1500PC programmable slew rate control IO

    full subtractor circuit using xor and nand gates

    Abstract: full subtractor circuit using nor gates 4-bit full adder using nand gates and 3*8 decoder 2 bit magnitude comparator using 2 xor gates 4-bit bcd subtractor 8 bit bcd adder subtractor BCD adder and subtractor half adder using x-OR and NAND gate bcd subtractor full adder circuit using xor and nand gates
    Text: pASIC Macro Library HIGHLIGHTS More than 350 Architecturally Optimized Macros Includes Simple Gates and Advanced Soft Macros Includes Over 100 7400-Series TTL Building Blocks SpDE Packs as Many as 4 Macros Into a Single Logic Cell SpDE's Logic Optimize maps many simple gates into a single logic cell


    Original     		PDF 7400-Series 10-bit TTL244q TTL259 TTL261 TTL268q full subtractor circuit using xor and nand gates full subtractor circuit using nor gates 4-bit full adder using nand gates and 3*8 decoder 2 bit magnitude comparator using 2 xor gates 4-bit bcd subtractor 8 bit bcd adder subtractor BCD adder and subtractor half adder using x-OR and NAND gate bcd subtractor full adder circuit using xor and nand gates

    CY7C342

    Abstract: CY7C342B
    Text: This is an abbreviated datasheet. Contact a Cypress Representative for complete specifications. For new designs, please refer to the CY7C342B. CY7C342 128-Macrocell MAX EPLDs Features • • • • • 128 macrocells in 8 LABs 8 dedicated inputs, 52 bidirectional I/O pins


    Original     		PDF CY7C342B. CY7C342 128-Macrocell 68-pin CY7C342 7C342 8-00500-A CY7C342B

    FUNCTIONAL DIAGRAM OF 7400

    Abstract: pin diagram 7400 series 7400 PIN DIAGRAM schematic diagram TMS34010 7400 series logic ICs 7400 TTL 7400 chip 7400 fan-out 7400 functional diagram TTL 7400
    Text: QAN8 Video Support Logic and VME Interface Dan Le Vasseur INTRODUCTION This application note describes how a video board based on the TMS34020 Graphics Processor was designed using a QuickLogic pASIC device to implement a complete VME slave interface and all the high-speed video


    Original     		PDF TMS34020 7400-series QL12x162PL84C) FUNCTIONAL DIAGRAM OF 7400 pin diagram 7400 series 7400 PIN DIAGRAM schematic diagram TMS34010 7400 series logic ICs 7400 TTL 7400 chip 7400 fan-out 7400 functional diagram TTL 7400

    CY7C342

    Abstract: of 7400 Series TTL TTL 7400 cmos logic 7400 series
    Text: 42 CY7C342 128-Macrocell MAX EPLD Features • • • • • 128 macrocells in 8 LABs 8 dedicated inputs, 52 bidirectional I/O pins Programmable interconnect array 0.8-micron double-metal CMOS EPROM technology Available in 68-pin HLCC, PLCC, and PGA packages


    Original     		PDF CY7C342 128-Macrocell 68-pin CY7C342 of 7400 Series TTL TTL 7400 cmos logic 7400 series

    TTL 7400

    Abstract: CY7C342 7400 datasheet ttl gate 7400 series CMOS Logic ICs 7400 series logic ICs 7400 TTL datasheet CY7C342B 7400series ttl cmos logic 7400 series
    Text: This is an abbreviated datasheet. Contact a Cypress Representative for complete specifications. For new designs, please refer to the CY7C342B. 1CY 7C34 2 fax id: 6103 CY7C342 128-Macrocell MAX EPLDs Features • • • • • 128 macrocells in 8 LABs 8 dedicated inputs, 52 bidirectional I/O pins


    Original     		PDF CY7C342B. CY7C342 128-Macrocell 68-pin CY7C342 7C342 TTL 7400 7400 datasheet ttl gate 7400 series CMOS Logic ICs 7400 series logic ICs 7400 TTL datasheet CY7C342B 7400series ttl cmos logic 7400 series

    TTL 7400

    Abstract: CY7C342 CY7C342B
    Text: This is an abbreviated datasheet. Contact a Cypress Representative for complete specifications. For new designs, please refer to the CY7C342B. CY7C342 128-Macrocell MAX EPLDs Features • • • • • 128 macrocells in 8 LABs 8 dedicated inputs, 52 bidirectional I/O pins


    Original     		PDF CY7C342B. CY7C342 128-Macrocell 68-pin CY7C342 7C342 TTL 7400 CY7C342B

    Q2N4401

    Abstract: D1N3940 Q2N2907A D1N1190 Q2SC1815 Q2N3055 Q2N1132 D1N750 D02CZ10 D1N751
    Text: Analog Parts Index Digital Mixed-Signal Device Type Index Click on a device type to jump to its page Actuator Fluid Level Detector Operational Amplifier Small-Signal Mosfet Amplifier/Equilizer Ground Fault Interrupter Opto-Isolator Switch Mulitplier Analog


    Original     		PDF RD91EB Q2N4401 D1N3940 Q2N2907A D1N1190 Q2SC1815 Q2N3055 Q2N1132 D1N750 D02CZ10 D1N751

    7400 series pin connection

    Abstract: 7400 QUAD Nor 7400 TTL palasm pin diagram 7400 series QL12X16B transistor quang TTL 7400 10/4 pin connector 7400 series logic ICs
    Text: QuickTools User's Guide with SpDE™ Reference May 1997 Copyright Information Copyright 1991-1997 QuickLogic Corporation. All rights reserved. The information contained in this manual and the accompanying software program are protected by copyright; all rights are reserved by QuickLogic Corporation.


    Original     		PDF Win32s, 7400 series pin connection 7400 QUAD Nor 7400 TTL palasm pin diagram 7400 series QL12X16B transistor quang TTL 7400 10/4 pin connector 7400 series logic ICs

    341B

    Abstract: 84-PIN CY7C341B
    Text: 341B CY7C341B 192-Macrocell MAX EPLD Features Typical ICC vs. fMAX • 192 macrocells in 12 LABs • 8 dedicated inputs, 64 bidirectional I/O pin • Advanced 0.65-micron CMOS technology to increase performance • Programmable interconnect array • 384 expander product terms


    Original     		PDF CY7C341B 192-Macrocell 65-micron 84-pin CY7C341B 341B

    84-PIN

    Abstract: CY7C341B ULTRA37000
    Text: USE ULTRA37000 FOR ALL NEW DESIGNS CY7C341B 192-Macrocell MAX EPLD Features • 192 macrocells in 12 logic array blocks LABs • Eight dedicated inputs, 64 bidirectional I/O pins • Advanced 0.65-micron CMOS technology to increase performance • Programmable interconnect array


    Original     		PDF ULTRA37000TM CY7C341B 192-Macrocell 65-micron 84-pin CY7C341B ULTRA37000

    84-PIN

    Abstract: CY7C341B C341B 7c341b2
    Text: CY7C341B 192-Macrocell MAX EPLD Features Typical ICC vs. fMAX • 192 macrocells in 12 LABs • 8 dedicated inputs, 64 bidirectional I/O pin • Advanced 0.65-micron CMOS technology to increase performance • Programmable interconnect array • 384 expander product terms


    Original     		PDF CY7C341B 192-Macrocell 65-micron 84-pin CY7C341B C341B 7c341b2

    Tic 4148

    Abstract: C346B CY7C346B-35NC 100-PIN CY7C346B 7400s
    Text: CY7C346B 128-Macrocell MAX EPLD Features The 128 macrocells in the CY7C346B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB. • • • •


    Original     		PDF CY7C346B 128-Macrocell CY7C346B 65-micron 84-pin 100-pin Tic 4148 C346B CY7C346B-35NC 7400s

    7400series

    Abstract: cmos logic 7400 series 7400 family TTL 7400-series EPM5016
    Text: The Complete Industry-Standard Programm able Logic Family MAX 5000 EPLDs 384 EPM5192 tpp = 25 ns - C/> 0> .c o 3 08 EPM5128 tpp —25 ns 256 CO Q. A EPM5130 tpp —25 ns O / ca> D EPM5064, tPD = 25 ns 128 ▲ EPM5032, tPD = 15 ns 64 ▲ EPM5016, tPD = 15 ns


    OCR Scan     		PDF EPM5192 EPM5128 EPM5130 EPM5064, EPM5032, EPM5016, 20-pin 100-pin 500-gate 7400series cmos logic 7400 series 7400 family TTL 7400-series EPM5016

    EPM5130

    Abstract: EPM5016
    Text: E P M 5016 to E P M 5192 E PLD s High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ Complete family of CMOS EPLDs solves design tasks ranging from fast 20-pin address decoders to 100-pin LSI custom peripherals.


    OCR Scan     		PDF 20-pin 100-pin 15-ns EPM5130 EPM5016

    D5032

    Abstract: IC TTL 7400 free J1810 Altera LP5 PLDS-ENCORE plej5128
    Text: PLDS-ENCORE MAX+PLUS, A+PLUS & SAM+PLUS Programmable Logic Development System Data Sheet September 1991, ver. 2 Contents □ □ □ □ □ General Description P L S -M A X — M A X + P L U S P ro g ra m m ab le Logic Softw are P L S - S U P R E M E — A + P L U S P ro g ra m m a b le L ogic Softw are


    OCR Scan     		PDF J1810 J5064 PLED910 486-based D5032 IC TTL 7400 free Altera LP5 PLDS-ENCORE plej5128

    Untitled

    Abstract: No abstract text available
    Text: EPM5016 to EPM5032 MAX EPLDs with a Single LAB Data Sheet January 1990 Product Summary □ □ □ □ □ □ □ □ □ Single-LAB CMOS EPLDs offering a consistent design solution across a broad range of speed and density requirem ents 15-ns combinatorial delays


    OCR Scan     		PDF EPM5016 EPM5032 15-ns 20-pin 28-pin 32-bit

    EPM5130

    Abstract: No abstract text available
    Text: EPM5130 EPLD □ High-density 128-macrocell general-purpose MAX 5000 EPLD □ 128 macrocells optim ized for pin-intensive applications, easily integrating over 60 TTL MSI and SSI components □ High pin count for 16- or 32-bit data paths □ 256 shareable expander product terms


    OCR Scan     		PDF EPM5130 128-macrocell 32-bit 16-bit

    Untitled

    Abstract: No abstract text available
    Text: EPM5192 EPLD p 0 3 tlirG S -I □ □ □ □ General _ . 192 macrocells for easy replacement of over 100 TTL devices and for integration of complete logic boards into a single package 384 shareable expander product terms that offer flexibility for register


    OCR Scan     		PDF EPM5192 84-pin 100-pin

    Untitled

    Abstract: No abstract text available
    Text: EPM5064 EPLD Features □ □ □ □ □ General Description High-density 64-macrocell general-purpose MAX 5000 EPLD 128 shareable expander product terms providing flexible logic expansion Over 32 product terms in a single macrocell 64 additional latches provided by cross-coupled expanders


    OCR Scan     		PDF EPM5064 64-macrocell 44-pin EPM5064-1, EPM5064-2, EPM5064 IL-STD-883-compliant

    Altera EPM5128

    Abstract: WKX 62 EPM5016 epm5130 pinouts for 7400 series EPM5064 EPM5192 program EPM5032 EPM5128 PACKAGING PLDS-MAX
    Text: EPM5016 to EPM5192 EPLDs High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ Complete family of CMOS EPLDs solves design tasks ranging from fast 20-pin address decoders to 100-pin LSI custom peripherals.


    OCR Scan     		PDF EPM5016 EPM5192 20-pin 100-pin 15-ns Altera EPM5128 WKX 62 epm5130 pinouts for 7400 series EPM5064 program EPM5032 EPM5128 PACKAGING PLDS-MAX

    EPM5130

    Abstract: No abstract text available
    Text: A L TE RA CORP □5*15372 0 0 D 2 1 4 2 4bT « A L T 47E D 'P f D - 0 l EPM5016 to EPM5192 EPLDs High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ Complete family of CMOS EPLDs solves design tasks ranging from


    OCR Scan     		PDF EPM5016 EPM5192 20-pin 100-pin 15-ns EPM5130

    Untitled

    Abstract: No abstract text available
    Text: EPM5064 EPLD Features □ □ □ □ □ General Description High-density 64-macrocell general-purpose MAX 5000 EPLD 128 shareable exp ander p rodu ct term s providing flexible logic expansion Over 32 product terms in a single macrocell 64 additional latches provided by cross-coupled expanders


    OCR Scan     		PDF EPM5064 64-macrocell 44-pin EPM5064 EPM5064-1, EPM5064-2,

    7400 series TTL pinouts

    Abstract: EPLD 5128
    Text: EPM 5128 EPLD Features □ □ High-density 128-macrocell general-purpose M AX 5000 EPLD 256 shareable expander product terms that allow over 32 product terms in a single macrocell High-speed multi-LAB architecture tPD as fast as 25 ns Counter frequencies up to 50 MHz


    OCR Scan     		PDF 128-macrocell 68-pin 5000-family 7400 series TTL pinouts EPLD 5128