CY14B101LA-SZ45XI
Abstract: CY14B101LA-SZ25XI
Text: CY14B101LA CY14B101NA 1 Mbit 128K x 8/64K x 16 nvSRAM 1 Mbit (128K x 8/64K x 16) nvSRAM Features Functional Description • 20 ns, 25 ns, and 45 ns Access Times ■ Internally Organized as 128K x 8 (CY14B101LA) or 64K x 16 (CY14B101NA) ■ Hands off Automatic STORE on Power Down with only a Small
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CY14B101LA
CY14B101NA
8/64K
CY14B101LA/CY14B101NA
CY14B101LA-SZ45XI
CY14B101LA-SZ25XI
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Untitled
Abstract: No abstract text available
Text: CY14V101LA CY14V101NA PRELIMINARY 1 Mbit 128K x 8/64K x 16 nvSRAM 1 Mbit (128K x 8/64K x 16) nvSRAM Features Functional Description • 25 ns and 45 ns Access Times ■ Internally Organized as 128K x 8 (CY14V101LA) or 64K x 16 (CY14V101NA) ■ Hands Off Automatic STORE on Power Down with only a small
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CY14V101LA
CY14V101NA
8/64K
CY14V101LA/CY14V101NA
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ftr 02
Abstract: F.TR.02 19 IDT BH package marking marking a7r
Text: AL5DS9xx9V Data Sheets 3.3V Synchronous Dual-Port SRAM AL5DS9349V/59V/69V/79V/89V 4K/8K/16K/32K/64K x 18 AL5DS9269V/79V/89V 16K/32K/64K x 16 AL5DS9149V/59V/69V/79V/89V/99V 4K/8K/16K/32K/64K/128K x 9 AL5DS9069V/79V/89V/99V 16K/32K/64K/128K x 8 Preliminary AL5DS9xx9V
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AL5DS9349V/59V/69V/79V/89V
4K/8K/16K/32K/64K
AL5DS9269V/79V/89V
16K/32K/64K
AL5DS9149V/59V/69V/79V/89V/99V
4K/8K/16K/32K/64K/128K
AL5DS9069V/79V/89V/99V
16K/32K/64K/128K
2002-Copyright
ftr 02
F.TR.02 19
IDT BH package marking
marking a7r
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cmos SRAM 35ns 8k X 8 dip
Abstract: 7C166 CY7C161 CY7C162 CY7C164 CY7C166 CY7C185 CY7C186 CY7C187 7C164
Text: Qualification Report January 1992 QTP 91094 64K SRAM FAMILY MARKETIN G DEVICE PART NBR DESCRIPTION CY7C161 16K x 4 SIO CY7C162 16K x 4 (SIO) CY7C164 16K x 4 CY7C166 (OE) CY7C185 8K x 8 CY7C186 8K x 8 (.6 DIP) CY7C187 64K x 1 Version 1.2 PRODUCT DESCRIPTION (for qualification)
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CY7C161
CY7C162
CY7C164
CY7C166
CY7C185
CY7C186
CY7C187
Cypr507/1
200mA
cmos SRAM 35ns 8k X 8 dip
7C166
CY7C161
CY7C162
CY7C164
CY7C166
CY7C185
CY7C186
CY7C187
7C164
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Untitled
Abstract: No abstract text available
Text: AL5DS9xx9V Data Sheets -1M bit Dual-Port SRAM AL5DS9389V -64K x 18 bits, 3.3V, Synchronous AL5DS9289V -64K x 16 bits, 3.3V, Synchronous AL5DS9199V -128K x 9 bits, 3.3V, Synchronous AL5DS9099V -128K x 8 bits, 3.3V, Synchronous Preliminary AL5DS9389V/9289V/9199V/9099V
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AL5DS9389V
--64K
AL5DS9289V
AL5DS9199V
--128K
AL5DS9099V
AL5DS9389V/9289V/9199V/9099V
2002-Copyright
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PDF
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"Dual-Port RAM" for video applications
Abstract: "32K x 16" dual port SRAM sram with address counter 3.3v counter
Text: AL5DS9xx9V 3.3V Synchronous Dual-Port SRAM 4K/8K/16K/32K/64K/128K x 8/9/16/18-bit Features True dual ported memory cells 17 Flow-Through/Pipelined devices: - 4K/8K/16K/32K/64K x 18-bit organization AL5DS9349V/59V/69V/79V/89V - 16K/32K/64K x 16-bit organization (AL5DS9269V/79V/89V)
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4K/8K/16K/32K/64K/128K
8/9/16/18-bit
4K/8K/16K/32K/64K
18-bit
AL5DS9349V/59V/69V/79V/89V)
16K/32K/64K
16-bit
AL5DS9269V/79V/89V)
8K/16K/32K/64K/128K
AL5DS9159V/69V/79V/89V/99V)
"Dual-Port RAM" for video applications
"32K x 16" dual port SRAM
sram with address counter
3.3v counter
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low power sram 64k
Abstract: 9l reset 1517R
Text: AL5DS9xx9V 3.3V Synchronous Dual-Port SRAM 4K/8K/16K/32K/64K/128K x 8/9/16/18-bit Features ! True dual ported memory cells ! 18 Flow-Through/Pipelined devices: - 4K/8K/16K/32K/64K x 18-bit organization AL5DS9349V/59V/69V/79V/89V - 16K/32K/64K x 16-bit organization (AL5DS9269V/79V/89V)
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4K/8K/16K/32K/64K/128K
8/9/16/18-bit
4K/8K/16K/32K/64K
18-bit
AL5DS9349V/59V/69V/79V/89V)
16K/32K/64K
16-bit
AL5DS9269V/79V/89V)
AL5DS9149V/59V/69V/79V/89V/99V)
low power sram 64k
9l reset
1517R
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Untitled
Abstract: No abstract text available
Text: AL5DS9xx9V Data Sheets -1M bit Dual-Port SRAM AL5DS9389V -64K x 18 bits, 3.3V, Synchronous AL5DS9289V -64K x 16 bits, 3.3V, Synchronous AL5DS9199V -128K x 9 bits, 3.3V, Synchronous AL5DS9099V -128K x 8 bits, 3.3V, Synchronous Preliminary AL5DS9389V/9289V/9199V/9099V
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AL5DS9389V
--64K
AL5DS9289V
AL5DS9199V
--128K
AL5DS9099V
AL5DS9389V/9289V/9199V/9099V
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PDF
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Untitled
Abstract: No abstract text available
Text: AL5DS9xx9V Data Sheets -1M bit Dual-Port SRAM AL5DS9389V -64K x 18 bits, 3.3V, Synchronous AL5DS9289V -64K x 16 bits, 3.3V, Synchronous AL5DS9199V -128K x 9 bits, 3.3V, Synchronous AL5DS9099V -128K x 8 bits, 3.3V, Synchronous Preliminary AL5DS9389V/9289V/9199V/9099V
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AL5DS9389V
--64K
AL5DS9289V
AL5DS9199V
--128K
AL5DS9099V
AL5DS9389V/9289V/9199V/9099V
2002-Copyright
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PDF
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SEM 2004
Abstract: CY7C008 CY7C009 CY7C018 CY7C019
Text: CY7C008/009 CY7C018/01964K/128K x 8/9 Dual-Port Static RAM CY7C008/009 CY7C018/019 64K/128K x 8/9 Dual-Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 64K x 8 organization CY7C008
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CY7C008/009
CY7C018/01964K/128K
CY7C018/019
64K/128K
CY7C008)
CY7C009)
CY7C018)
CY7C019)
35-micron
SEM 2004
CY7C008
CY7C009
CY7C018
CY7C019
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29IO1
Abstract: A62S6308 bga 6x8 Package bga 6x8
Text: A62S6308 Series 64K X 8 BIT LOW VOLTAGE CMOS SRAM Document Title 64K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. History Issue Date Remark 1.0 Initial issue September 01, 1997 Preliminary 1.1 Modify TSOP TSSOP pin configuration. January 16, 1998
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A62S6308
32-pin
36-ball
29IO1
bga 6x8 Package
bga 6x8
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Untitled
Abstract: No abstract text available
Text: STATIC SRAM RAM Random Access Memory TSOP LH5164AT-80L CMOS 64K 8K x 8
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LH5164AT-80L
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A62S6308
Abstract: bga 6x8
Text: A62S6308 Series 64K X 8 BIT LOW VOLTAGE CMOS SRAM Document Title 64K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. History Issue Date Remark 1.0 Initial issue September 01, 1997 Preliminary 1.1 Modify TSOP TSSOP pin configuration. January 16, 1998
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A62S6308
32-pin
36-ball
bga 6x8
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PDF
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A62S6308AM
Abstract: A62S6308AV-70SF A62S6308AM-55SUF A62S6308AM-55SF
Text: A62S6308A Series Preliminary 64K X 8 BIT LOW VOLTAGE CMOS SRAM Document Title 64K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 0.0 PRELIMINARY History Issue Date Remark Initial issue May 31, 2011 Preliminary May, 2011, Version 0.0 AMIC Technology, Corp.
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A62S6308A
076MM
A62S6308AM
A62S6308AV-70SF
A62S6308AM-55SUF
A62S6308AM-55SF
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CY7C194
Abstract: CY7C195 CY7C199 EME-6300H
Text: Qualification Report December 1996 - QTP# 95149 Version 1.1 256K SRAM, R28 TECHNOLOGY, FAB 4 QUAL MARKETING PART NUMBER DEVICE DESCRIPTION CY7C194 64K x 4 Static RAM CY7C195 64K x 4 Static RAM CY7C199 32K x 8 Static RAM PRODUCT DESCRIPTION for qualification
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CY7C194
CY7C195
CY7C199
15psig)
CY7C199-VC
28-pin,
300-mil
200mA
CY7C194
CY7C195
CY7C199
EME-6300H
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CY14B101LA-SZ45XI
Abstract: CY14B101LA-SZ25XI
Text: CY14B101LA, CY14B101NA 1 Mbit 128K x 8/64K x 16 nvSRAM Features Functional Description • 20 ns, 25 ns, and 45 ns Access Times ■ Internally Organized as 128K x 8 (CY14B101LA) or 64K x 16 (CY14B101NA) ■ Hands off Automatic STORE on Power Down with only a Small
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CY14B101LA,
CY14B101NA
8/64K
CY14B101LA/CY14B101NA
CY14B101LA-SZ45XI
CY14B101LA-SZ25XI
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PDF
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DRAM 256 X 1, 18 PDIP
Abstract: 64K X 4 SRAM mmui
Text: A Contents Fast SRAM Low Voltage Fast SRAM Short Form 1995 AS7C164 8K x 8 3 AS7C256 32K x 8 4 AS7C259 32K x 9 5 AS7C512 64K x 8 6 AS7C1024 128K x 8 300/400 mil 7 AS7C1028 256K x 4 400 mil 8 AS7C3256 32K x 8 3.3V 9 AS7C3512 64K x 8 3.3V 10 AS7C31024 128K x 8
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AS7C164
AS7C256
AS7C259
AS7C512
AS7C1024
AS7C1028
AS7C3256
AS7C3512
AS7C31024
AS7C33232
DRAM 256 X 1, 18 PDIP
64K X 4 SRAM
mmui
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PDF
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saa 1291
Abstract: CY7C008 CY7C009 CY7C018 CY7C019 IDT7008
Text: iJë- CY7C008/009 CY7C018/019 : CYPRESS PRELIMINARY 64K/128K x 8/9 Dual-Port Static RAM Features True Dual-Ported memory cells which allow sim ulta neous access of the same memory location 64K x 8 organization CY7C008 128K x 8 organization (CY7C009) 64K x 9 organization (CY7C018)
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OCR Scan
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CY7C008/009
CY7C018/019
CY7C008)
CY7C009)
CY7C018)
CY7C019)
35-micron
64K/128K
saa 1291
CY7C008
CY7C009
CY7C018
CY7C019
IDT7008
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PDF
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Untitled
Abstract: No abstract text available
Text: DPE4648 □PM Dense-Pac Microsystems. Inc. 64K X 8 CMOS EEPROM MODULE DESCRIPTION: The DPE4648 is a high-performance Electrically Erasable and Programmable Read Only Memory EEPROM module organized 64K X 8. The DPE4648 is upward pin compatable with the JEDEC standard 128K X 8 SRAM module and
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DPE4648
DPE4648
64-Bytes
500mV
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PDF
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cwe 610
Abstract: PE4648
Text: □PM Dense-Pac Microsystems. Inc. 64K X 8 C O DPE4648 S EEPROM MODULE DESCRIPTION: The DPE4648 is a high-performance Electrically Erasable and Programmable Read Only Memory EEPROM) module organized 64K X 8. The DPE4648 is upward pin compatable with the JEDEC standard 128K X 8 SRAM module and
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DPE4648
DPE4648
64-Bytes
500mV
cwe 610
PE4648
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PDF
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Untitled
Abstract: No abstract text available
Text: Í D P M 7Dense-Pac Microsystems. Inc. 0 DPS1025 64K X 16 CMOS SRAM MODULE NOT RECOMMENDED FOR NEW DESIGNS D ESCRIPTIO N : The DPS1025 is a 64K X 8 high-speed, low-power static RAM module comprised of sixteen 64K X 1 monolithic SRAM 's, and decoupling capacitors
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OCR Scan
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DPS1025
DPS1025
Complete601
S1025
125-C
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PDF
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Untitled
Abstract: No abstract text available
Text: fax id: 5214 CYPRESS CY7C008V/009V CY7C018V/019V PRELIMINARY 3.3V 64K/128K x 8/9 Dual-Port Static RAM Features True Dual-Ported mem ory cells which allow sim ulta neous access of the same mem ory location 64K x 8 organization CY7C008 128K x 8 organization (CY7C009)
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CY7C008V/009V
CY7C018V/019V
64K/128K
CY7C008)
CY7C009)
CY7C018)
CY7C019)
35-micron
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PDF
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Untitled
Abstract: No abstract text available
Text: _ CY7C008/009 CY7C018/019 s ->«a " p Y p - 64K/128K x 8/9 Dual-Port Static RAM Features • True Dual-Ported memory cells which allow simulta neous access of the same memory location • 64K x 8 organization CY7C008 • 128K x 8 organization (CY7C009)
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OCR Scan
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CY7C008/009
CY7C018/019
64K/128K
CY7C008)
CY7C009)
CY7C018)
CY7C019)
35-micron
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PDF
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Untitled
Abstract: No abstract text available
Text: DPS1025 Dense-Pac Microsystems. Inc. ^ 64K X 16 C M O S S R A M M O D U L E NOT RECOMMENDED FOR NEW DESIGNS DESCRIPTION: The DPS1025 is a 64K X 8 high-speed, low-power static R A M module comprised of sixteen 64K X 1 monolithic SRAM 's, and decoupling capacitors
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DPS1025
DPS1025
30A00
S1025
3QA00MH
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