K7Q161852A
Abstract: K7Q161852A-FC10 K7Q161852A-FC13 K7Q161852A-FC16 K7Q163652A K7Q163652A-FC10 K7Q163652A-FC13 K7Q163652A-FC16
Text: K7Q163652A K7Q161852A 512Kx36 & 1Mx18 QDRTM b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit QDRTM SRAM Revision History History Draft Date Remark 0.0 1. Initial document. April, 30, 2001 Advance 0.1 1. Amendment 1 Page 3,4 PIN NAME DESCRIPTION W 4A) : from Read Control Pin to Write Control
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K7Q163652A
K7Q161852A
512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit
K7Q161852A
K7Q161852A-FC10
K7Q161852A-FC13
K7Q161852A-FC16
K7Q163652A
K7Q163652A-FC10
K7Q163652A-FC13
K7Q163652A-FC16
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K7Z327285M
Abstract: No abstract text available
Text: K7Z327285M Preliminary 512Kx72 DLW Double Late Write RAM Document Title 512Kx72 DLW(Double Late Write) RAM Revision History Rev. No. 0.0 0.1 History Draft Date Remark 1. Initial document. 1. Device name change from Double Late Write SigmaRAM to Double Late Write RAM
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K7Z327285M
512Kx72
512Kx72
11x19
00x10
00x18
K7Z327285M
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IBM0418A41NLAB
Abstract: IBM0418A81NLAB IBM0436A41NLAB IBM0436A81NLAB
Text: IBM0436A41NLAB IBM0418A41NLAB IBM0418A81NLAB IBM0436A81NLAB 8Mb 256Kx36 & 512Kx18 and 4Mb (128Kx36 & 256Kx18) SRAM . Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • Registered outputs • 30 Ω drivers
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IBM0436A41NLAB
IBM0418A41NLAB
IBM0418A81NLAB
IBM0436A81NLAB
256Kx36
512Kx18)
128Kx36
256Kx18)
crrL3325
IBM0418A41NLAB
IBM0436A81NLAB
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10D-11
Abstract: K7R160982B K7R160982B-FC16 K7R160982B-FC20 K7R161882B K7R161882B-FC16 K7R161882B-FC20 K7R163682B K7R163682B-FC16 K7R163682B-FC20
Text: K7R163682B K7R161882B K7R160982B 512Kx36 & 1Mx18 & 2Mx9 QDR TM II b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit, 2Mx9-bit QDRTM II b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Oct. 17, 2002 Advance 0.1 1. Change the Boundary scan exit order.
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K7R163682B
K7R161882B
K7R160982B
512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit,
10D-11
K7R160982B
K7R160982B-FC16
K7R160982B-FC20
K7R161882B
K7R161882B-FC16
K7R161882B-FC20
K7R163682B
K7R163682B-FC16
K7R163682B-FC20
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SAMSUNG MCP
Abstract: MCP MEMORY dQ8F SAMSUNG MCP Qualification Report MCP NAND SAMSUNG 256Mb mcp Qualification Reliability SAMSUNG 256Mb NAND Flash Qualification Reliability UtRAM Density MCP Samsung SAMSUNG NOR Flash Qualification Report
Text: Preliminary MCP MEMORY KBC00B7A0M Document Title Multi-Chip Package MEMORY 256M Bit 16Mx16 Nand Flash Memory / 64M Bit (4Mx16) UtRAM / 64M Bit (4Mx16) UtRAM / 8M Bit (512Kx16) SRAM Revision History Revision No. History Draft Date Remark 0.0 Initial draft.
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KBC00B7A0M
16Mx16)
4Mx16)
512Kx16)
100pF
111-Ball
SAMSUNG MCP
MCP MEMORY
dQ8F
SAMSUNG MCP Qualification Report
MCP NAND
SAMSUNG 256Mb mcp Qualification Reliability
SAMSUNG 256Mb NAND Flash Qualification Reliability
UtRAM Density
MCP Samsung
SAMSUNG NOR Flash Qualification Report
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14Q7
Abstract: No abstract text available
Text: K3P4C1000D-D G C CMOS MASK ROM 8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM FEATURES GENERAL DESCRIPTION • Switchable organization 1,048,576 x 8(byte mode) 524,288 x 16(word mode) • Fast access time Random Access : 100ns(Max.) Page Access : 30ns(Max.) • 4 Words / 8 bytes page access
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K3P4C1000D-D
/512Kx16)
100ns
K3P4C1000D-DC
42-DIP-600
K3P4C1000D-GC
44-SOP-600
K3P4C1000DD
14Q7
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K7Q161864B-FC16
Abstract: D0-35 K7Q161864B K7Q163664B K7Q163664B-FC16
Text: K7Q163664B K7Q161864B 512Kx36 & 1Mx18 QDRTM b4 SRAM Document Title 512Kx36-bit, 1Mx18-bit QDRTM SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Jan. 27, 2004 Advance 1.0 1. Final spec release Mar. 18, 2004 Final Rev. No. The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
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K7Q163664B
K7Q161864B
512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit
K7Q161864B-FC16
D0-35
K7Q161864B
K7Q163664B
K7Q163664B-FC16
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IBM0418A8ACLAB
Abstract: IBM0436A4ACLAB IBM0436A8ACLAB IBM0418A4ACLAB
Text: . IBM0418A4ACLAB IBM0436A8ACLAB Preliminary IBM0418A8ACLAB IBM0436A4ACLAB 8Mb 256Kx36 & 512Kx18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • 0.25 Micron CMOS technology
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IBM0418A4ACLAB
IBM0436A8ACLAB
IBM0418A8ACLAB
IBM0436A4ACLAB
256Kx36
512Kx18)
128Kx36
256Kx18)
crlh3320
IBM0418A8ACLAB
IBM0436A4ACLAB
IBM0436A8ACLAB
IBM0418A4ACLAB
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K7D803671B-HC33
Abstract: K7D803671B-HC30 K7D801871B-HC35 K7D801871B-HC37 K7D803671B K7D803671B-HC25 K7D803671B-HC35 K7D803671B-HC37
Text: K7D803671B K7D801871B 256Kx36 & 512Kx18 SRAM Document Title 8M DDR SYNCHRONOUS SRAM Revision History Rev No. History Draft Data Remark Rev. 0.0 -Initial document. July. 2000 Advance Rev. 0.1 -ZQ tolerance changed from 10% to 15% Aug. 2000 Advance Rev. 0.2
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K7D803671B
K7D801871B
256Kx36
512Kx18
-HC16
012MAX
K7D803671B-HC33
K7D803671B-HC30
K7D801871B-HC35
K7D801871B-HC37
K7D803671B
K7D803671B-HC25
K7D803671B-HC35
K7D803671B-HC37
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K7B801825B
Abstract: K7B803625B
Text: K7B803625B K7B801825B 256Kx36 & 512Kx18 Synchronous SRAM Document Title 256Kx36 & 512Kx18-Bit Synchronous Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 Initial draft May. 18 . 2001 Preliminary 0.1 Add x32 org part and industrial temperature part
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K7B803625B
K7B801825B
256Kx36
512Kx18
512Kx18-Bit
119BGA
225MHz
K7B801825B
K7B803625B
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K7N161801A
Abstract: K7N163601A
Text: K7N163601A K7N161801A 512Kx36 & 1Mx18 Pipelined NtRAM TM Document Title 512Kx36 & 1Mx18-Bit Pipelined NtRAMTM Revision History Rev. No. History Draft Date Initial document. Add JTAG Scan Order Add x32 org and industrial temperature . Add 165FBGA package Speed bin merge.
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K7N163601A
K7N161801A
512Kx36
1Mx18
1Mx18-Bit
165FBGA
K7N1636
K7N161801A
K7N163601A
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IBM0418A4ANLAB
Abstract: IBM0418A8ANLAB IBM0436A4ANLAB IBM0436A8ANLAB
Text: . Preliminary IBM0418A4ANLAB IBM0418A8ANLAB IBM0436A8ANLAB IBM0436A4ANLAB 8Mb 256Kx36 & 512Kx18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • 0.25µ CMOS technology • Synchronous Register-Latch Mode of Operation
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IBM0418A4ANLAB
IBM0418A8ANLAB
IBM0436A8ANLAB
IBM0436A4ANLAB
256Kx36
512Kx18)
128Kx36
256Kx18)
crlL3325
IBM0418A8ANLAB
IBM0436A4ANLAB
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IBM0418A41XLAB
Abstract: IBM0418A81XLAB IBM0436A41XLAB IBM0436A81XLAB
Text: . Preliminary IBM0418A81XLAB IBM0436A81XLAB IBM0418A41XLAB IBM0436A41XLAB 8Mb 256Kx36 & 512Kx18 and 4Mb (128Kx36 & 256Kx18) SRAM Features • 8Mb: 256K x 36 or 512K x 18 organizations 4Mb: 128K x 36 or 256K x 18 organizations • 0.25 Micron CMOS technology
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IBM0418A81XLAB
IBM0436A81XLAB
IBM0418A41XLAB
IBM0436A41XLAB
256Kx36
512Kx18)
128Kx36
256Kx18)
crrh2516
IBM0418A41XLAB
IBM0418A81XLAB
IBM0436A41XLAB
IBM0436A81XLAB
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D0-35
Abstract: K7J161882B K7J161882B-FC16 K7J161882B-FC20 K7J161882B-FC25 K7J163682B K7J163682B-FC16 K7J163682B-FC20 K7J163682B-FC25
Text: K7J163682B K7J161882B 512Kx36 & 1Mx18 DDR II SIO b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Dec. 16, 2002 Advance 0.1 1. Change the JTAG Block diagram Dec. 26, 2002 Preliminary
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K7J163682B
K7J161882B
512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit
165FBGA
D0-35
K7J161882B
K7J161882B-FC16
K7J161882B-FC20
K7J161882B-FC25
K7J163682B
K7J163682B-FC16
K7J163682B-FC20
K7J163682B-FC25
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Memory
Abstract: FTS8L32512V
Text: FTS8L32512V 512Kx32 SRAM Module.3.3V FEATURES DESCRIPTION DSP Memory Solution The FTS8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP and RISC microprocessor memory solutions.
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FTS8L32512V
512Kx32
FTS8L32512V
ADSP-21060L
ADSP-21062L
TMS320LC31
MPC860
512Kx8,
FTI8K32512V
Memory
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Untitled
Abstract: No abstract text available
Text: K7A163608A K7A163208A K7A161808A PRELIMINARY 512Kx36/x32 & 1Mx18 Synchronous SRAM Document Title 512Kx36/x32 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. 0.0 0.1 History Draft Date Remark 1. Initial draft 1. Add x32 org and industrial temperature
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K7A163608A
K7A163208A
K7A161808A
512Kx36/x32
1Mx18
1Mx18-Bit
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Untitled
Abstract: No abstract text available
Text: o bq4850Y U N I T R O D E - RTC Module with 512Kx8 NVSRAM Features General Description >• I n te g r a t e d SRAM, re a l-tim e clock, crystal, power-fail control circuit, and battery The bq4850Y RTC Module is a non volatile 4,194,304-bit SRAM organ
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bq4850Y
512Kx8
304-bit
32-pin
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TSOP 173 g
Abstract: KM684000ALG-7 4000 CMOS KM684000ALGI-7L KM684000ALP-7L KM684000ALP-5L KM684000A KM684000AL KM684000ALI KM684000ALI-L
Text: i, CMOS SRAM KM684000A Family 512Kx8 bit High Speed CMOS Static RAM FEATURE SUMMARY GENERAL DESCRIPTION • Process Technology: 0.4 um CMOS The KM684000A family is fabricated by SAMSUNG'S advanced CMOS process technology. The family • Organization : 512K x8
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KM684000A
512Kx8
32-DIP,
32-SOP,
32-TSOP
71b4142
DD23bST
TSOP 173 g
KM684000ALG-7
4000 CMOS
KM684000ALGI-7L
KM684000ALP-7L
KM684000ALP-5L
KM684000AL
KM684000ALI
KM684000ALI-L
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KM4132G512Q
Abstract: BA 59 04A F P SM 11039 sgram
Text: SGRAM MODULE KM M 965G112Q P N / KMM966G112Q(P)N 8MB SGRAM MODULE (1 Mx64 SODIMM based on 512Kx32 SGRAM) Unbuffered SGRAM Graphics 64-bit Non-ECC/Parity 144-pin SODIMM Revision 2.1 March 1998 . i _ &prrranNre This Material Copyrighted By Its Respective Manufacturer
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KMM965G112Q
KMM966G112Q
512Kx32
64-bit
144-pin
KM4132G512Q
BA 59 04A F P
SM 11039
sgram
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Untitled
Abstract: No abstract text available
Text: HY628400 Series •'H Y U N D A I 512Kx8bit CMOS SRAM DESCRIPTION FEATURES The HY628400 is a high-speed, low power and 4M bits CMOS SRAM organized as 524,288 words by 8 bits. The HY628400 uses Hyundai's high performance twin tub CMOS process technology and was designed for high-speed and
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OCR Scan
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HY628400
512Kx8bit
HY628400
04/0ct
32pin
525mil
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HY628400LP
Abstract: No abstract text available
Text: HY628400-I Series 'H Y U N D A I 512KX 8-bit CMOS SRAM PRELIMINARY DESCRIPTION The HY628400-I is a high-speed, low power and 524,288 x 8-bits CMOS static RAM fabricated using Hyundai’s high performance twin tub CMOS process technology. This high reliability process coupled with innovative circuit
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HY628400-I
512KX
4b75GÃ
1DE02-11-MÃ
HY628400LP-I
HY628400LLP-I
HY628400LP
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Untitled
Abstract: No abstract text available
Text: “HYUNDAI HY628400-I Series _ 512Kx 8-bit CMOS SRAM PRELIMINARY DESCRIPTION The HY628400-I is a high-speed, low power and 524,288 x 8-bits CMOS static RAM fabricated using Hyundai’s high performance twin tub CMOS process technology. This high reliability process coupled with innovative circuit
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HY628400-I
512Kx
1DE02-11-MAY94
4b750flfl
D003fll2
HY628400LP-I
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KM23V8100D
Abstract: KM23V8100DET KM23V8100DT
Text: CM OS M ASK ROM KM23V81 OOD E T 8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM FEATURES G ENERAL DESCRIPTION • S w itc h a b le o rg a n iz a tio n 1 ,0 4 8 ,5 7 6 x 8 (b y te m o d e ) 5 2 4 ,2 8 8 x 16 (w ord m o de) • F a st a c c e s s tim e : 3 .3 V o p e ra tio n : 1 0 0 n s (M a x .)
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KM23V81
/512Kx16)
100ns
120ns
KM23V8100D
44-TSQP2-400
KM23V8100DET
KM23V8100DT
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KM29N040T
Abstract: 741 IC data sheet bhrb data sheet IC 741 KM29N04 samsung flash bad block mapping
Text: KM29N040T ELECTRONICS Flash 512Kx8Bit NAND Flash Memory FEATURES GENERAL DESCRIPTION • Single 5.0 - volt Power Supply The KM29N040T is a 512Kx8bit NAND Flash memory. • Organization - Memory Cell Array - Data Register Its NAND cell structure provides the most cost-effective
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KM29N040T
512Kx8
500us
400mil/0
KM29N040T
512Kx8bit
KM29N040
KM29N040T)
7TL4142
741 IC data sheet
bhrb
data sheet IC 741
KM29N04
samsung flash bad block mapping
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