Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    396MW Search Results

    SF Impression Pixel

    396MW Price and Stock

    KLS Electronic L-KLS1-D3-3396-MW1

    CONN. DIN 3x32 96PIN 90C MALE PIN HEIGHT 13.00M
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    New Advantage Corporation L-KLS1-D3-3396-MW1 398 1
    • 1 -
    • 10 -
    • 100 $2.74
    • 1000 $2.55
    • 10000 $2.55
    Buy Now

    396MW Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    msm51v17800b

    Abstract: MSM51V17800 SOJ28 bsl 100
    Text: お客様各位 資料中の「沖電気」「OKI」等名称の OKI セミコンダクタ株式会社への変更について 2008 年 10 月 1 日を以って沖電気工業株式会社の半導体事業は OKI セミコン ダクタ株式会社に承継されました。 従いまして、本資料中には「沖電気工業株


    Original
    J2G0076-17-41 MSM51V17800B/BSL MSM51V17800B/BSL 152-Word MSM51V17800B/BSLCMOS2 42CMOS 28SOJ28TSOP 04832ms2 048128msSL 28400milSOJ msm51v17800b MSM51V17800 SOJ28 bsl 100 PDF

    SOJ28

    Abstract: bsl 100 MSM51V16800B
    Text: お客様各位 資料中の「沖電気」「OKI」等名称の OKI セミコンダクタ株式会社への変更について 2008 年 10 月 1 日を以って沖電気工業株式会社の半導体事業は OKI セミコン ダクタ株式会社に承継されました。 従いまして、本資料中には「沖電気工業株


    Original
    J2G0074-17-41 MSM51V16800B/BSL MSM51V16800B/BSL 152-Word MSM51V16800B/BSLCMOS2 42CMOS 28SOJ28TSOP 09664ms4 096128msSL 28400milSOJ SOJ28 bsl 100 MSM51V16800B PDF

    17800

    Abstract: No abstract text available
    Text: GM71V17800C GM71VS17800CL 2,097,152 WORDS x 8 BIT CMOS DYNAMIC RAM Description Features The GM71V S 17800C/CL is the new generation dynamic RAM organized 2,097,152 x 8 bit. GM71V(S)17800C/CL has realized higher density, higher performance and various functions by utilizing advanced CMOS process


    Original
    GM71V17800C GM71VS17800CL GM71V 17800C/CL 17800 PDF

    HY51VS

    Abstract: No abstract text available
    Text: HY51V S 16160HG/HGL 1M x 16Bit Fast Page DRAM PRELIMINARY DESCRIPTION The HY51V(S)16160HG/HGL is the new generation dynamic RAM organized 1,048,576 words x 16bit. HY51V(S)16160HG/HGL has realized higher density, higher performance and various functions by utilizing advanced CMOS process technology. The HY51V(S)16160HG/HGL offers Fast Page Mode as a high


    Original
    HY51V 16160HG/HGL 16Bit 16160HG/HGL 16bit. HY51VS PDF

    Untitled

    Abstract: No abstract text available
    Text: HY51V S 65163HG/HGL 4M x 16Bit EDO DRAM PRELIMINARY DESCRIPTION This familiy is a 64Mbit dynamic RAM organized 4,194,304 x 16bit configuration with Extended Data Out mode CMOS DRAMs. Extended data out mode is a kind of page mode which is useful for the read operation. The advanced circuit and process allow this device to achieve high performance and low power dissipation. Features are access time(45ns or 50ns) and refresh cycle(4K ref ) and power consumption (Normal


    Original
    HY51V 65163HG/HGL 16Bit 64Mbit 100us. 400mil 50pin PDF

    Untitled

    Abstract: No abstract text available
    Text: HY51V S 16163HG/HGL 1M x 16Bit EDO DRAM PRELIMINARY DESCRIPTION The HY51V(S)16163HG/HGL is the new generation dynamic RAM organized 1,048,576 words x 16bit. HY51V(S)16163HG/HGL has realized higher density, higher performance and various functions by utilizing advanced CMOS process technology. The HY51V(S)16163HG/HGL offers Extended Data Out PageMode as a high speed access mode. Multiplexed address inputs permit the HY51V(S)16163HG/HGL to be


    Original
    HY51V 16163HG/HGL 16Bit 16163HG/HGL 16bit. PDF

    Untitled

    Abstract: No abstract text available
    Text: SM572013001Q4GU August 1996 Rev 0 SMART Modular Technologies SM572013001Q4GU 8MByte 1M x 72 , 5.0V, CMOS DRAM Module - Buffered General Description Features The SM572013001Q4GU is a high performance, 8-megabyte dynamic RAM module organized as 1M words by 72 bits, in a 168-pin, dual-in-line (DIMM)


    Original
    SM572013001Q4GU 168-pin, 1Mx16 74ABT16244 74ACT11244) PDF

    Untitled

    Abstract: No abstract text available
    Text: SM53616100UP3UU October 1996 Rev 2A SMART Modular Technologies SM53616100UP3UU 64MByte 16M x 36 CMOS DRAM Module General Description Features The SM53616100UP3UU is a high performance, 64-megabyte dynamic RAM module organized as 16M words by 36 bits, in a 72-pin, leadless, single-in-line


    Original
    SM53616100UP3UU SM53616100UP3UU 64MByte 64-megabyte 72-pin, SM536161002P3UU SM536161004P3UU 16Mx1 64MByte PDF

    RS560C

    Abstract: RS560 common base amplifier circuit common emitter amplifier
    Text: Issued July 1983 004-591 Data Pack J RF amplifier IC RS560C Data Sheet RS stock number 303-214 A high performance low noise RF amplifier i.c. in an 8 pin DIL package. The large number of circuit nodes accessible from the outside of the package affords great flexibility, enabling the operating currents and


    Original
    RS560C RS560C RS560 common base amplifier circuit common emitter amplifier PDF

    GM71V64403C

    Abstract: GM71VS64403CL
    Text: GM71V64403C GM71VS64403CL 16,777,216 WORDS x 4 BIT CMOS DYNAMIC RAM Description Pin Configuration The GM71V S 64403C/CL is the new generation dynamic RAM organized 16,777,216 words by 4bits. The GM71V(S)64403C/CL utilizes advanced CMOS Silicon Gate Process Technology as well as


    Original
    GM71V64403C GM71VS64403CL GM71V 64403C/CL 64403C/CL-5 64403C/CL-6 GM71V64403C GM71VS64403CL PDF

    16mx4

    Abstract: HY51V64400A
    Text: HY51V64400A,HY51V65400A 16Mx4, Fast Page mode 2nd Generation DESCRIPTION This family is a 64M bit dynamic RAM organized 16,777,216 x 4-bit configuration with Fast Page mode CMOS DRAMs. Fast Page mode offers high speed of random access memory within the same row. The circuit and process design allow


    Original
    HY51V64400A HY51V65400A 16Mx4, 128ms cycle/64ms) 16Mx4 10/Sep PDF

    Untitled

    Abstract: No abstract text available
    Text: GM71V64403C GM71VS64403CL 16,777,216 WORDS x 4 BIT CMOS DYNAMIC RAM Description Pin Configuration The GM71V S 64403C/CL is the new generation dynamic RAM organized 16,777,216 words by 4bits. The GM71V(S)64403C/CL utilizes advanced CMOS Silicon Gate Process Technology as well as


    Original
    GM71V64403C GM71VS64403CL GM71V 64403C/CL 27scribed PDF

    Untitled

    Abstract: No abstract text available
    Text: HY51V64800A,HY51V65800A 8Mx8, Fast Page mode 2nd Generation DESCRIPTION This family is a 64M bit dynamic RAM organized 8,388,608 x 8-bit configuration with Fast Page mode CMOS DRAMs. Fast Page mode offers high speed of random access memory within the same row. The circuit and process design allow


    Original
    HY51V64800A HY51V65800A 128ms cycle/64ms) 12/Sep PDF

    TSOP 54 PIN

    Abstract: No abstract text available
    Text: IBM0165160B 4M x 16 DRAM Features • Low Power Dissipation - Active: 504mW/432mW/396mW max - Standby (LVTTL Inputs): 7.2mW (max) - Standby (LVCMOS Inputs): 720mW (max) • 4,194,304 word by 16 bit organization • Single 3.3 ± 0.3V power supply • 4096 refresh cydes/64ms


    OCR Scan
    IBM0165160B cydes/64ms 504mW/432mW/396mW 720mW TSOP-54 500milx875mil) 110ns 130ns IBM0165160BT5A fabricate01 TSOP 54 PIN PDF

    MSM51V17100

    Abstract: No abstract text available
    Text: O K I Semiconductor MSM51V17100 16,777,216-Word x 1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE DESCRIPTION The M SM 51V 17I00 is a new generation dynam ic organized as 16,777,216-word x 1-bit. The technology used to fabricate the M SM 51V I7100 is OKI's CM O S silicon gate process technology.


    OCR Scan
    MSM51VI7100 216-Word MSM51V17100 cycles/32ms MSM51V17100 A0-A11 PDF

    Untitled

    Abstract: No abstract text available
    Text: HM51W16400 Series HM51W17400 Series 4,194,304-word x 4-bit Dynamic Random Access Memory HITACHI ADE-203-649A Z Rev. 1.0 Oct. 14, 1996 Description The Hitachi H M 51W 16400 Series, H M 51W 17400 Series are CMOS dynamic RAMs organized 4 ,194,304word X 4-bit. They employ the m ost advanced 0.5 Jim CMOS technology for high performance and low


    OCR Scan
    HM51W16400 HM51W17400 304-word ADE-203-649A 304word 300-mil 26-pin ns/70 PDF

    S5400A

    Abstract: RO3035
    Text: •« Y U M D H I • HY51 V64400A,HY51 V65400A 16Mx4, Fast Page mode DESCRIPTION This family is a 64M bit dynamic RAM organized 16,777,216 x 4-bit configuration with Fast Page mode CMOS DRAMs. Fast Page mode offers high speed of random access memory within the same row. The circuit and process design allow


    OCR Scan
    V64400A V65400A 16Mx4, 128ms cycle/64ms) S5400A RO3035 PDF

    A6070M

    Abstract: 780sa 7805A PI 81V17805 81v17805a
    Text: P R E L IM IN A R Y - - August 1996 Edition 2.0 FUJITSU PRODUCT PROFILE SHEET MB 81 V 1 7 8 0 5 A -6 0 /7 0 /6 0 L /7 0 L CMOS 2M X 8BIT HYPER PAGE MODE DYNAMIC RAM CMOS 2,097,1 52x 8BIT Hyper Page Mode Dynamic RAM The Fujitsu MB81V17805A is a fully decoded CMOS Dynamic RAM DRAM that contains


    OCR Scan
    MB81V17805A A6070M 780sa 7805A PI 81V17805 81v17805a PDF

    81v1

    Abstract: No abstract text available
    Text: PRELIMINARY - - August 1996 Edition 3.0 FUJITSU PRODUCT PROFILE SHEET MB 81 V1 7800A-60/70/60L/70L CMOS 2M X 8BIT FAST PAGE MODE DYNAMIC RAM CMOS 2,097,152 x 8BIT Fast Page Mode Dy na m ic RAM The Fujitsu M B81V17800A is a fully decoded CM OS Dynamic RAM DRAM that contains


    OCR Scan
    800A-60/70/60L/70L B81V17800A 024-bits DS05-10169-2E 81v1 PDF

    m51171

    Abstract: No abstract text available
    Text: OKI Semiconductor MSM51V17180 1,048,576-Word x 18-Bit DYNAMIC RAM : FAST PAGE MODE TYPE DESCRIPTION The MSM51V17180 is a new generation Dynam ic RA M organized as 1,048,576-word x 18-bit configuration. The technology used to fabricate the MSM51V17180 is O K I's CM O S silicon gate process technology.


    OCR Scan
    MSM51V17180 576-Word 18-Bit MSM51V17180 cycles/32ms m51171 PDF

    RT-6

    Abstract: No abstract text available
    Text: MITSUBISHI LS Is M5M4V4280J,TP,RT-6,-7,-8,-6S,-7S,-8S PAGE MODE 4718592-BIT 262144-WORD BY 18-BIT DYNAMIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) This is a family of 262144-word by 18-bit dynamic RAMs, fabricated with the high performance CMOS process, and is


    OCR Scan
    M5M4V4280J 4718592-BIT 262144-WORD 18-BIT) 18-bit RT-6 PDF

    MSM51V17100

    Abstract: 724540
    Text: O K I Semiconductor MSM5 1 V1 7 1 0 0 _ 16,777,216-Word x 1-Bit D Y N A M IC RA M : FAST PAGE M O D E TYPE DESCRIPTION The MSM51V17100 is a new generation dynamic organized as 16,777,216-word x 1-bit. The technology used to fabricate the MSM51V17100 is OKI's CMOS silicon gate process technology.


    OCR Scan
    MSM51V17100_ 216-Word MSM51V17100 cycles/32ms MSM51V17100 A0-A11 b724240 724540 PDF

    TI AIH

    Abstract: R 161 730 000
    Text: O K I Semiconductor MSM51 V17160 1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE DESCRIPTION The MSM51V17160 is a new generation Dynamic RAM organized as 1,048,576-word x 16-bit configuration. The technology used to fabricate the MSM51V17160 is OKI's CMOS silicon gate process technology.


    OCR Scan
    MSM51VI7160 576-Word 16-Bit MSM51V17160 cycles/32ms TI AIH R 161 730 000 PDF

    STR06

    Abstract: No abstract text available
    Text: MITSUBISHI M E M O R Y / A S I C blE D • b 2 4 cifiSS O O l V b ? 1* 5 3 ^ ■ M I T I M ITSUBISHI L S Is M 5 M 4 V 4 2 6 0 J , L , T P , R T - 6 , - 7 , - 8 , - 6 S , - 7 S , - 8 S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM \T A f i


    OCR Scan
    4194304-BIT 262144-WORD 16-BIT) 16-bit M5M4V4260J 44P3W-E STR06 PDF