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    32DIP Price and Stock

    Microchip Technology Inc PIC32MX120F032D-I/PT

    IC MCU 32BIT 32KB FLASH 44TQFP
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    DigiKey PIC32MX120F032D-I/PT Tray 1,521 1
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    Avnet Americas PIC32MX120F032D-I/PT Tray 4 Weeks 320
    • 1 $3.43
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    Mouser Electronics PIC32MX120F032D-I/PT 1,032
    • 1 $3.43
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    Microchip Technology Inc PIC32MX120F032D-I/PT 38,827
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    TME PIC32MX120F032D-I/PT 1
    • 1 $3.6
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    NAC PIC32MX120F032D-I/PT Tray 30,880 1
    • 1 $3.56
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    Master Electronics PIC32MX120F032D-I/PT 320
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    Lighthorse Technologies Inc CB1.32D-IPX-MCFGT-6IN

    CBL ASSY IPEX MHF1-MMCX JK-PL 6"
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    DigiKey CB1.32D-IPX-MCFGT-6IN Bulk 200 1
    • 1 $11.04
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    • 100 $8.83
    • 1000 $6.8
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    Lighthorse Technologies Inc CB1.32D-IPX-MCLFGT-4IN

    CBL ASSY IPEX MHF1-MMCX JK-PL 4"
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    DigiKey CB1.32D-IPX-MCLFGT-4IN Bulk 200 1
    • 1 $11.38
    • 10 $10.71
    • 100 $9.11
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    Lighthorse Technologies Inc CB1.32D-IPX-SAMGT-10IN

    CBL ASSY IPEX MHF1-SMA PL-PL 10"
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    DigiKey CB1.32D-IPX-SAMGT-10IN Bulk 200 1
    • 1 $9.1
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    • 100 $7.28
    • 1000 $5.6
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    Lighthorse Technologies Inc CB1.32D-IPX-MCLFGT-8IN

    CBL ASSY IPEX MHF1-MMCX JK-PL 8"
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    DigiKey CB1.32D-IPX-MCLFGT-8IN Bulk 200 1
    • 1 $11.79
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    Find more 32DIP price and stock on Findchips.com

    32DIP Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    32DIP

    Abstract: IC128 27nC
    Text: App87Lx-3.2 June 6, 1996 MICROCONTROLLER TECHNOLOGY PROGRAMMER SUPPORT APPLICATION NOTE SCOPE: COP87Lxx Family Third-party Programming Adapters. Adapters are available which allow programming all family devices from a single 32 pin DIP pinout Select COP87Lxx-32 Adapter from the programmer menu . The 32DIP pinout mapping


    Original     		PDF App87Lx-3 COP87Lxx COP87Lxx-32 32DIP fax-8339. /28D6-Zxx-COP87Lxx 31----PROG 30----CE 29----NC 28----NC IC128 27nC

    WSP-401M

    Abstract: BD103 dms-200d bd102 transisTOR C123 2N5401C-Y DG04 rsb7 sk101 S1D2514X01
    Text: S1D2514X01 Preliminary VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS VIDEO AMP MERGED OSD PROCESSOR 32-DIP-600A The S1D2514X01 is a very high frequency video amplifier & wide range OSD processor 1 chip system with I2C Bus control used in monitors. It contains 3 matched R/G/B video


    Original     		PDF S1D2514X01 32-DIP-600A S1D2514X01 S1D2514X01-D0B0 1N4148 1SS244 WSP-401M BD103 dms-200d bd102 transisTOR C123 2N5401C-Y DG04 rsb7 sk101

    K8D3216UBC-pi07

    Abstract: K5E5658HCM KAD070J00M KBH10PD00M K5D1257ACM-D090000 samsung ddr2 ram MTBF KBB05A500A K801716UBC k5d1g13acm k5a3281ctm
    Text: Product Selection Guide Memory and Storage April 2005 MEMORY AND STORAGE SECTION A DRAM DDR2 SDRAM DDR SDRAM SDRAM RDRAM NETWORK DRAM MOBILE SDRAM GRAPHICS DDR SDRAM DRAM ORDERING INFORMATION FLASH NAND, OneNAND, NOR FLASH NAND FLASH ORDERING INFORMATION SRAM


    Original     		PDF BR-05-ALL-002 K8D3216UBC-pi07 K5E5658HCM KAD070J00M KBH10PD00M K5D1257ACM-D090000 samsung ddr2 ram MTBF KBB05A500A K801716UBC k5d1g13acm k5a3281ctm

    16MB SRAM

    Abstract: 1024k DS1270W DS1249W DS1265W 36-DIP
    Text: INDUSTRY’S HIGHEST DENSITY 3.3V NONVOLATILE SRAMs Densities up to 16Mb Protect Data for 3.3V Systems The DS1249W, DS1265W, and DS1270W are low-voltage, high-density NV SRAMs designed to preserve critical system data during power loss. Each of these dual in-line encapsulated modules operates on a single 3.3V power supply and employs


    Original     		PDF DS1249W, DS1265W, DS1270W 100ns 150ns DS1249W DS1265W 1024k 2048k 16MB SRAM 36-DIP

    s134 p-mosfet

    Abstract: 74hc260 Mitsumi D359T3 D359T3 schematic diagram inverter lcd monitor fujitsu 62256-10 BERG STRIP teac fd 235hf stepping motor mitsumi mitsumi floppy
    Text: frt Page 1 Thursday, August 8, 1996 12:36 PM ÉlanSC300 Microcontroller Evaluation Board User’s Manual evalbd.book : frt Page 2 Thursday, August 8, 1996 12:14 PM ÉlanSC300 Microcontroller Evaluation Board, Revision 1.1 1996 by Advanced Micro Devices, Inc.


    Original     		PDF lanSC300 s134 p-mosfet 74hc260 Mitsumi D359T3 D359T3 schematic diagram inverter lcd monitor fujitsu 62256-10 BERG STRIP teac fd 235hf stepping motor mitsumi mitsumi floppy

    Mitsumi D359T3

    Abstract: D359T3 Video Card AVED AV540 mitsumi floppy d359* mitsumi SCHEMATIC TRIDENT VGA board EPROM AMD s134 p-mosfet stepping motor mitsumi 62256-10
    Text: evalbd.book : frt Page 1 Thursday, August 8, 1996 2:34 PM ÉlanSC310 Microcontroller Evaluation Board User’s Manual evalbd.book : frt Page 2 Thursday, August 8, 1996 2:34 PM ÉlanSC310 Microcontroller Evaluation Board, Revision 1.0 1996 by Advanced Micro Devices, Inc.


    Original     		PDF lanSC310 227ing Mitsumi D359T3 D359T3 Video Card AVED AV540 mitsumi floppy d359* mitsumi SCHEMATIC TRIDENT VGA board EPROM AMD s134 p-mosfet stepping motor mitsumi 62256-10

    MR27V401E

    Abstract: MR27V401EMA MR27V401ERA MR27V401ETA
    Text: Dear customers, About the change in the name such as "Oki Electric Industry Co. Ltd." and "OKI" in documents to OKI Semiconductor Co., Ltd. The semiconductor business of Oki Electric Industry Co., Ltd. was succeeded to OKI Semiconductor Co., Ltd. on October 1, 2008.


    Original     		PDF

    pal 007c

    Abstract: b1100 nec LDP16 sulzer s7 7-segment countdown timer MDP36 100LQ128 3pin round shell connector DP83932B LT1084CT-3.3
    Text: MiniRISC BDMR4011 Evaluation Board User’s Guide A CoreWare® Product March 1998 ® Order Number XXXXX Document DB15-000055-00, First Edition March 1998 This document describes revision A of LSI Logic Corporation’s BDMR4011 Evaluation Board and will remain the official reference source for all revisions/releases of this product until rescinded by an update.


    Original     		PDF BDMR4011 DB15-000055-00, respons3580 pal 007c b1100 nec LDP16 sulzer s7 7-segment countdown timer MDP36 100LQ128 3pin round shell connector DP83932B LT1084CT-3.3

    MAX147

    Abstract: No abstract text available
    Text: 19-0465; Rev 2; 10/01 KIT ATION EVALU E L B A AVAIL +2.7V, Low-Power, 8-Channel, Serial 12-Bit ADCs These devices provide a hard-wired SHDN pin and a software-selectable power-down, and can be programmed to automatically shut down at the end of a conversion. Accessing the serial interface automatically


    Original     		PDF 12-Bit MAX146) MAX147) 133ksps, SPI/QSPI/MICROWIRE/TMS320-Compatible 20-Pin MAX146/MAX147 MAX146/MAX147 MAX147

    K6X1008C2D-GF55

    Abstract: K6X1008C2D-TF55 K6X1008C2D-TB55 K6X1008C2D-F samsung k6x1008c2d K6X1008C2D-TF70
    Text: Preliminary CMOS SRAM K6X1008C2D Family Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History Draft Data Remark 0.0 Initial draft July 15, 2002 Preliminary 0.1 Revised - Deleted 32-TSOP1-0820R Package Type. - Added Commercial product.


    Original     		PDF K6X1008C2D 128Kx8 32-TSOP1-0820R 0820F) K6X1008C2D-GF55 K6X1008C2D-TF55 K6X1008C2D-TB55 K6X1008C2D-F samsung k6x1008c2d K6X1008C2D-TF70

    K6T1008C2E-GB70

    Abstract: K6T1008C2E-TB55
    Text: K6T1008C2E Family CMOS SRAM Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History Draft Data Remark 0.0 Design target October 12, 1998 Preliminary 1.0 Finalize - Improve tWP form 55ns to 50ns for 70ns product. - Remove 55ns speed bin for industrial product.


    Original     		PDF K6T1008C2E 128Kx8 0820F) K6T1008C2E-GB70 K6T1008C2E-TB55

    lh537

    Abstract: 42DIP lh533200 LH535g
    Text: MEMORIES • Mask ROMs Process CMOS ★ U n d e r development MEMORIES ★ Under developm ent Configuration Process Capacity (wortsxbits Access time (ns) MAX. Model No. Pinout LH-538VXX 100 100 5 ± 10% 32DIP/32SOP/32TSOPÎII) Normal 120 60 5 ± 10% L H 5 3 8 3 0 0 C D /C W C S Æ S H


    OCR Scan     		PDF LH-538VXX LH-5387XX LH-538NXX 32DIP/32SOP/32TSOP 32DIP/32SOP/ 32TSOP 42DIP/44SOP 48TSOP0) lh537 42DIP lh533200 LH535g

    KM681001-25

    Abstract: KM681001-20 KM681001-35 tl2245 KM681001
    Text: KM681001 CMOS SRAM 128K x 8 Bit High-Speed CMOS Static RAM FEATURES GENERAL DESCRIPTION • Fast Access Time 20,25,35 ns Max. • Low Power Dissipation Standby (TTL) : 40 mA(Max.) (CMOS): 2 mA(Max.) Operating KM681001-20 : 170 mA(Max.) KM681001-25:150 mA(Max.)


    OCR Scan     		PDF KM681001 KM681001-20 KM681001-25 KM681001 KM681001P: 32-DIP-400 32-SQJ-400 576-bit KM681001-20 KM681001-35 tl2245

    TAA 310A

    Abstract: KM681000BLP-7L 128k x8 SRAM TSOP km681000blp-7 KM681000B KM681000BL KM681000BLE KM681000BL-L
    Text: KM681000B Family CMOS SRAM 128Kx8 bit High Speed CMOS Static RAM FEATURE SUMMARY GENERAL DESCRIPTION • Process Technology: 0.6 um CMOS • Organization : 128K x 8 • Power Supply Voltage : Single 5V +/-10% • Low Data Retention Voltage : 2V Min • Three state output and TTL Compatible


    OCR Scan     		PDF KM681000B 128Kx8 0023b3? KM681OOOÃ 0D23b3Ã TAA 310A KM681000BLP-7L 128k x8 SRAM TSOP km681000blp-7 KM681000BL KM681000BLE KM681000BL-L

    A1SH

    Abstract: 32DIP 32-PIN LH532100B-1 A14C
    Text: LH532100B-1 FEATURES CMOS 2M 256K x 8 Mask-Programmable ROM PIN CONNECTIONS • 262,144 words x 8 bit organization • Access time: 120 ns (MAX.) 32-PIN DIP 32-PIN SOP TOP VIEW f \ O E ^ O E i/D C C • Static operation • TTL compatible I/O • Three-state outputs


    OCR Scan     		PDF LH532100B-1 32-pin, 600-miI 525-miI 450-mil 400-mil A1SH 32DIP 32-PIN LH532100B-1 A14C

    KM684000BLP-7

    Abstract: KM684000B KM684000BL KM684000BLI KM684000BLI-L KM684000BL-L KM684000BLP-5 KM684000BLP-5L KM684000BLP-7L KM684000BLG-7L
    Text: Prem iìinary CMOS SRAM KM684000B Family 512Kx8 bit Low Power CMOS Static RAM FEATURES GENERAL DESCRIPTION ~ - The KM684000B family is fabricated by SAMSUNG'S advanced CMOS process technology. The family can support various operating temperature ranges and has various package types


    OCR Scan     		PDF KM684000B 512Kx8 512Kx8 32-DIP, 32-SOP, 32-TSOP 003bS17 KM684000BLP-7 KM684000BL KM684000BLI KM684000BLI-L KM684000BL-L KM684000BLP-5 KM684000BLP-5L KM684000BLP-7L KM684000BLG-7L

    23C4000

    Abstract: No abstract text available
    Text: GM23C4000 GoldStar 524,288 WORDS x 8 BIT CMOS MASK ROM GOLDSTAR ELECTRON CO., LTD. Pin Configuration 32 DIP Top View D escription The G M 23C 4000 high-perform ance Read Only M em ory is organized as 524,288 w ords by eight bits and has an access tim e o f 150/200ns. It is


    OCR Scan     		PDF GM23C4000 150/200ns. 23C4000 23C4000

    Untitled

    Abstract: No abstract text available
    Text: m PRELIMINARY GM76FV8128,GM76FU8128,GM76FS8128,GM76FR8128 LG Semicon Co.,Ltd. 131,072 w o r d s x 8 b i t CMOS STATIC RAM Description Pin Configuration The GM76FV8128 / GM76FU8128 / GM76FS8128 / GM76FS8128 is a 1,048,576 bits static random access memory organized as 131,072 words by 8 bits. Using a


    OCR Scan     		PDF GM76FV8128 GM76FU8128 GM76FS8128 GM76FR8128 70/85ns. 32Small

    lh5s4

    Abstract: lh5348 LH5s lh5s47xx 48-TSOP LH53H4100D LH53H4100N lh534y00d 48TSOP sharp mask rom
    Text: NEW PRODUCT INFORMATION SHARP LH53 H4100 • Description High-speed 4M-bit Mask-Programmable ROM ■ Pin Connections The LH53H4100D/N User's No. ! LH5H41XX is a CMOS 4M-bit mask-programmable ROM organized as 524 288 X 8 bits. It is fabricated using sillicon-gate CMOS process technology.


    OCR Scan     		PDF LH53H4100 LH53H4100D/N LH5H41XX) LH53H4100D LH53H4100N 32-pin DIP032-P-0600) OP032-P-0525) A0-A18 lh5s4 lh5348 LH5s lh5s47xx 48-TSOP LH53H4100N lh534y00d 48TSOP sharp mask rom

    Untitled

    Abstract: No abstract text available
    Text: KM23C8000B G ELECTRONICS CMOS Mask ROM 8M-Bit (1M X8) CMOS MASK ROM FEATURES GENERAL DESCRIPTION • 1,048,576x 8 bit organization • Fast access time :100ns(max.) • Supply voltage : single +5V • Current consumption Operating : 60 mA(max.) Standby : 50 fiA (max.)


    OCR Scan     		PDF KM23C8000B 100ns KM23C8000B 32-DIP-600 KM23C8000BG 32-SOP-525 576x8bit.

    Untitled

    Abstract: No abstract text available
    Text: KM684000A Family_ CMOS SRAM 512Kx8 bit Low Power CMOS Static RAM FEATURES GENERAL DESCRIPTION •• Process Technology : 0.4 * CMOS •• Organization : 512Kx8 •■ Power Supply Voltage : Single 5V •• 10% ■ Low Data Retention Voltage : 2V Min


    OCR Scan     		PDF KM684000A 512Kx8 512Kx8 32-DIP, 32-SOP, 32-TSOP 47MAX

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY KM23C8001H CMOS MASK ROM 8M-Bit 1M X 8 CMOS MASK ROM FEATURES GENERAL DESCRIPTION • • • • The KM23C8001H is a fully static mask programmable ROM organized 1 ,0 4 8 ,5 7 6 X 8 bit. It is fabricated using silicon-gate CMOS process technology.


    OCR Scan     		PDF KM23C8001H KM23C8001H 100ns 32-pin, sing60 KM23C8001H) KM23C8001HG)

    Untitled

    Abstract: No abstract text available
    Text: KM681000B Family CMOS SRAM Document Title 128K x8 bit Low Power CMOS Static RAM Revision History History Draft Data Remark 0.0 Initial draft for com m ercial product - Com mercial Product only O ctober 28th, 1992 Prelim inary 0.1 - Initial draft for Extended/Industrial Product


    OCR Scan     		PDF KM681000B 0820F) 0820R)

    Untitled

    Abstract: No abstract text available
    Text: KM23C4000D G CMOS MASK ROM 4M-Bit (512Kx8) CMOS MASK ROM GENERAL DESCRIPTION FEATURES • • • • • • • • 524,288x8 bit organization Access tim e : 80ns(M ax.) Supply voltage : single +5V Current consumption Operating : 50m A(M ax.) Standby : 50|iA(M ax.)


    OCR Scan     		PDF KM23C4000D 512Kx8) 288x8 23C4000D 32-DIP-600 23C4000DG 32-SOP-525 23C4000D