12 sot23-3
Abstract: TRANSISTOR Outlines 12 sot23 marking code 10 sot23 STM1001SBWX6F STM1001 N1418 13 SOT23-3
Text: STM1001 Reset circuit Features • Precision monitoring of 3 V, 3.3 V, and 5 V supply voltages ■ Open drain RST output ■ 30 ms or 140 ms reset pulse width min ■ Low supply current - 6 µA (typ) ■ Guaranteed RST assertion down to VCC= 1.0 V ■ Operating temperature:
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STM1001
OT23-3
12 sot23-3
TRANSISTOR Outlines
12 sot23
marking code 10 sot23
STM1001SBWX6F
STM1001
N1418
13 SOT23-3
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Untitled
Abstract: No abstract text available
Text: STM1001 Reset circuit Features • Precision monitoring of 3 V, 3.3 V, and 5 V supply voltages ■ Open drain RST output ■ 30 ms or 140 ms reset pulse width min ■ Low supply current - 6 µA (typ) ■ Guaranteed RST assertion down to VCC= 1.0 V ■ Operating temperature:
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STM1001
OT23-3
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TDA7575
Abstract: Gv2 overload TDA7575PD 2x40W X000XXXX
Text: CD00003142 Rev 3.0 ACTIVE PAGE A MULTIFUNCTION DUAL BRIDGE POWER AMPLIFIER WITH INTEGRATED DIGITAL DIAGNOSTICS Datasheet DOCUMENT HISTORY Version Rev 3.0 Release Date Change Offset Voltage pag.3 : min=−45mV; max=45mV; Update of the "Package Mechanical Data" page.
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CD00003142
-45mV;
22-Mar-2004
TDA7575
Gv2 overload
TDA7575PD
2x40W
X000XXXX
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AN1012
Abstract: M48Z32V
Text: M48Z32V 3.3V, 256Kbit 32Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, and powerfail control circuit ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages:
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M48Z32V
256Kbit
32Kbit
M48Z32V:
44-pin
AN1012
M48Z32V
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DSA0047280
Abstract: 1534a DAC7744 DAC7744E DAC7744EB DAC7744EC
Text: DAC7744 DAC 774 4 For most current data sheet and other product information, visit www.burr-brown.com 16-Bit, Quad Voltage Output DIGITAL-TO-ANALOG CONVERTER FEATURES DESCRIPTION ● LOW POWER: 200mW ● UNIPOLAR OR BIPOLAR OPERATION ● SINGLE-SUPPLY OUTPUT RANGE: +10V
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DAC7744
16-Bit,
200mW
16-BIT
DAC7744
DSA0047280
1534a
DAC7744E
DAC7744EB
DAC7744EC
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AN1012
Abstract: M48Z32V
Text: M48Z32V 3.3V, 256Kbit 32Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, and powerfail control circuit ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages:
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Original
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PDF
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M48Z32V
256Kbit
32Kbit
M48Z32V:
44-pin
AN1012
M48Z32V
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Untitled
Abstract: No abstract text available
Text: THIS DRAWING IS COPYRIGHT UNPUBLISHED. 20 RELEASED BY TYCO ELECTRONICS CORPORATION FOR ALL 20 PUBLICATION RIGHTS LOC REV I S IONS D I ST FT RESERVED. LTR R E V I S E D PER 0 G 3 B - 0 7 I 4 - 0 I R E V I S E D EC 0 G 3 B - 0 I 4 5 - 0 4 R E V I S E D EC 0 G 3 B - 0 4 0 I - 04
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OCR Scan
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05APR2002
22MAR2004
N2004
06PEB2002
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2N6326
Abstract: 2N6331 3822E 2N6327 2N6328 2N6329 LE17
Text: 22-MAR-2004 15=47 FROM MAGNATEC TO 08701200205 P.02/03 IR TEC M agnatec MAGNA Magna Park, Coventry Road, Lutterworth Leicestershire LE17 4JB. England Sales telephone: 01455 554711 Admin telephone: 01455 552505 Fax: 01455 558843 CBrtitorto No. PM 38Z3B ^ J Y P È S 2 NB 329, 2N 6330À 2NB3315
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OCR Scan
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22-MAR-2004
3822E
2N6329,
42N6330
v2NB331
2N6326
2N6327,
2N6328
200-mJ
2N6331
3822E
2N6327
2N6328
2N6329
LE17
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Untitled
Abstract: No abstract text available
Text: 2 T H I S DRAWING IS U N P U B L IS H E D . C O P Y RI G H T 2 0 R E L E A S E D FOR P U B L I C A T I O N LOC BY T Y C O E L E C T R O N I C S C O R P O R A T I O N . A L L R |3 H T S R E S E R V E D . REV I S I ONS D I ST 00 LTR DE SC R I P T I O N DWN
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OCR Scan
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OB60-OI18-04
27DEC2004
22MAR2004
22MAR04
3imar200Ã
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Untitled
Abstract: No abstract text available
Text: TH I S DRAW ING IS U NP UBL I S HE D. R E L E A S E D FOR P U B L I C A T I O N BY TYCO E L E C T R O N I C S COPYRIGHT 2 0 0 4 CORPORATION. ALL RIGHTS 2004 LOC AD RE S E RV E D. 2.5 REF 2.5 5 r g p - | —i ISJi— JL isr^rn ROW c - 3 - L IX L I ROW D1
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OCR Scan
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PDF
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22MAR2004
17AUG2007
ECO-07-018141
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NG42
Abstract: No abstract text available
Text: T H I S DRAWING IS U N P U B L IS H E D . C O P Y R I G H T 20 R E L E A S E D F OR P U B L I C A T I O N 20 LOC BY TYCO E L E C T R O N I C S C O R P O R AT IO N A LL R IG H T S R E S E R V E D . REV I S IONS D I ST FT LTR DWN DATE DESCRIPTION R E V I S E D P E R 0 G 3 B - 0 I 19-01
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OCR Scan
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PDF
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EB2002
22MAR2004
NG42
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Untitled
Abstract: No abstract text available
Text: TH I S DRAW ING IS UNPUBLISHED. RELEASED FOR PUBLICATION 20 LOC COPYRIGHT 20 R E V 1S I O N S D I ST FT BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. p LTR DESCR1PTION L M N P . 094 DATE DWN APVD R E V I S E D EC 0 G 3 B - 0 8 9 0 - 0 3 2 4 NOV 2 0 0 3
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0G3B-0890-03
22MAR2004
21FEB2005
5FEB2006
23MAY2003
3IMAR2000
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