Untitled
Abstract: No abstract text available
Text: HICR0N TECHNOLOGY INC bOE D • b l l l S H 1! GGObbOl 43b ■ urn PRELIMINARY 256K x 16 DRAM WIDE DRAM FAST-PAGE-MODE SELF REFRESH FEATURES PIN ASSIGNMENT Top View • SELF REFRESH, or "Sleep M ode" • Industry-standard x l6 p inouts, tim ing, functions
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500mW
512-cycle
MT4C16256/7/8/9S
MT4C16256/7/8/9
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LH61664AK-50
Abstract: LH61665AK lh61665 LH5PV8512 16256S
Text: PSEUDO SRAM/DYNAMIC RAM • PSEUDO SRAMs ♦ Features • Random access memory with ease of use equivalent to SRAM. Supply current MAX. C apacity Bit C onfiguration 256k x 8 Model No. LH 5P 832/D /N -10/12 Access time ns MAX. Cycle time (ns) MIN. O perating
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LH5P864N
5P1632/N-80/15
32SOP
DIP/40SOP
32DIP/32SOP/32TSOP
32TSOP
DIP/32SOP/32TSOP(
/32TS
44TSO
LH61664AK-50
LH61665AK
lh61665
LH5PV8512
16256S
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t3d01
Abstract: pin configuration of IC 1619 cp LM 3177 C16-256 MT4C16257
Text: PRELIMINARY M T 4C 16256/7/8/9 S 256K X 16 WIDE DRAM |U |I C R O N WIDE DRAM 2 5 6 K X 16 DRAM FAST-PAGE-MODE SELF REFRESH FEATURES OPTIONS P IN A S S IG N M E N T 4 0 -P in S O J T o p 4 0 -P in MARKING • Timing 70ns access -7 80ns access -8 • Write Cycle Access
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512-cycle
MT4C16257/9
MT4C16258/9
MT4C16256/7
MT4C16256/7/0/9
t3d01
pin configuration of IC 1619 cp
LM 3177
C16-256
MT4C16257
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY 256K W IDE DRAM 16 DRAM X FAST-PAGE-MODE SELF REFRESH FEATURES PIN A SSIG N M EN T Top View • SELF REFRESH, or "Sleep M ode" • Industry-standard x l6 pinouts, tim ing, functions and packages • H igh-perform ance CMOS silicon-gate process
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500mW
512-cycle
MT4C16257/9
MT4C16256/7/8/9
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Untitled
Abstract: No abstract text available
Text: CMOS 4M 256K x 16 Pseudo-Static RAM FEATURES DESCRIPTION • 262,144 words x 16 bit organization T he LH 5P V 16256 is a 4M bit P seudo-S tatic RAM w ith a 262 ,14 4 w ords x 16 bit organization. • Power supply: +3.0 ± 0.15 V • Access time: 120 ns (MAX.)
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cycles/32
44-pin,
44-PIN
TSOP44-P-400)
400-m
4-P-400)
5PV16256S-12
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