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    SK 3050 R

    Abstract: sk a 3050 c
    Text: * SYN ER G Y R E G I S T E R E D HEX S^OI-ibSi? PECL-TO-TTL SY1D0HB07 S E M IC O N D U C T O R DESCRIPTION FEATURES Differential PECL data and clock inputs 48mA sink, 15mA source TTL outputs I Single +5V power supply 1Multiple power and ground pins to minimize noise


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    PDF SY1D0HB07 MC10H/100H607 28-pin 10/100H SY10H607JC SY10H607JCTR SY100H607JC 100H6O7JCTR J28-1 SK 3050 R sk a 3050 c