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    0031E Search Results

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    0031E Price and Stock

    Vishay Siliconix SQD40031EL_GE3

    MOSFET P-CH 30V 100A TO252AA
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    DigiKey SQD40031EL_GE3 Reel 6,000 2,000
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    SQD40031EL_GE3 Cut Tape 1,442 1
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    SQD40031EL_GE3 Digi-Reel 1
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    New Advantage Corporation SQD40031EL_GE3 4,000 1
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    Wurth Elektronik 1540031EC4590

    SENSOR PHOTODIODE 940NM RADIAL
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    DigiKey 1540031EC4590 Bulk 1,410 1
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    Mouser Electronics 1540031EC4590 225
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    Newark 1540031EC4590 Bulk 62 1
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    Vishay Siliconix SQM40031EL_GE3

    MOSFET P-CH 40V 120A D2PAK
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    DigiKey SQM40031EL_GE3 Cut Tape 732 1
    • 1 $3.93
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    SQM40031EL_GE3 Reel 401 800
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    SQM40031EL_GE3 Digi-Reel 1
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    Amphenol Piher PST360G2-2AA-C0031-ERA270-REK

    HALL-EFFECT THROUGH-SHAFT ROTARY
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    DigiKey PST360G2-2AA-C0031-ERA270-REK Bulk 50 1
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    Newark PST360G2-2AA-C0031-ERA270-REK Bulk 1
    • 1 $65.76
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    Amphenol Piher PST360G2-2AA-C0031-ERA270-05K

    HALL-EFFECT THROUGH-SHAFT ROTARY
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    DigiKey PST360G2-2AA-C0031-ERA270-05K Bulk 50 1
    • 1 $75.66
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    Newark PST360G2-2AA-C0031-ERA270-05K Bulk 12 1
    • 1 $62.28
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    • 100 $47.24
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    0031E Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    2032LV

    Abstract: PT12 0138a 0031e 0034B ispLSI1000 isplsi architecture
    Text: 2000, 2000E and 2000V Family Architectural Description global GLB clock input signals CLK0, CLK1, and CLK2. These three clocks are used for clocking all the GLBs configured as registers in the device. They feed directly to the GLB clock input via a clock multiplexer. CLK0 is


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    PDF 2000E t20ptxor) 2-0042-16/2K 2032-135L. 2032LV PT12 0138a 0031e 0034B ispLSI1000 isplsi architecture

    7486 XOR GATE

    Abstract: circuit diagram of half adder using IC 7486 7486 2-input xor gate ic 7486 XOR GATE pin configuration IC 7486 pin configuration of 7486 IC vhdl code for vending machine pin DIAGRAM OF IC 7486 data sheet IC 7408 laf 0001
    Text: Lattice Semiconductor Handbook 1994 Click on one of the following choices: • Table of Contents • How to Use This Handbook • Go to Main Menu 1996 Lattice Semiconductor Corporation. All rights reserved. Lattice Semiconductor Handbook 1994 i Copyright © 1994 Lattice Semiconductor Corporation.


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    PDF

    PLSI 1016-60LJ

    Abstract: PAL 007 pioneer pal16r8 programming algorithm PAL 008 pioneer lattice 1016-60LJ ISP Engineering Kit - Model 100 PLSI-2064-80LJ GAL16v8 programmer schematic GAL programming Guide ispLSI 2064-80LT
    Text: Lattice Semiconductor Data Book 1996 Click on one of the following choices: • Table of Contents • Data Book Updates & New Products • Go to Main Menu 1996 Lattice Semiconductor Corporation. All rights reserved. ispLSI and pLSI Product Index Pins Density


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    PDF 1016E 1032E 20ters 48-Pin 304-Pin PLSI 1016-60LJ PAL 007 pioneer pal16r8 programming algorithm PAL 008 pioneer lattice 1016-60LJ ISP Engineering Kit - Model 100 PLSI-2064-80LJ GAL16v8 programmer schematic GAL programming Guide ispLSI 2064-80LT

    Untitled

    Abstract: No abstract text available
    Text: MB91550 Series 32-bit Microcontroller FR Family FR81S MB91F552 Data Sheet Full Production Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Spansion Inc. deems the products to have been in sufficient production volume


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    PDF MB91550 32-bit FR81S MB91F552 MB91F552 DS705-00015 DS705-00015-1v0-E,

    "XOR Gate"

    Abstract: 2032E 2128E ispLSI2000-A 74 XOR GATE 2032VE
    Text: 2000E, 2000/A, 2000VE 2000VL and 2000V Family Architectural Description or slow output slew rate to minimize overall output switching noise. Introduction The basic unit of logic for the ispLSI 2000E, 2000/A, 2000VE, 2000VL and 2000V device families is the Generic Logic Block GLB . Figure 1 illustrates the ispLSI


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    PDF 2000E, 2000/A, 2000VE 2000VL 2000VE, 2128E 2032E "XOR Gate" ispLSI2000-A 74 XOR GATE 2032VE

    Untitled

    Abstract: No abstract text available
    Text: Motorola Digital Signal Processors DSP56001 Interface Techniques and Examples by Roman Robles Digital Signal Processor Operation MOTOROLA APR11 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of


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    PDF DSP56001 APR11 AN987 DSP56000/DSP56001 DSP56000UM/AD, 56-Bit DSP56001/D, DL138, MCM514256A

    2032VE

    Abstract: No abstract text available
    Text: 2000E, 2000VE and 2000VL Family Architectural Description or slow output slew rate to minimize overall output switching noise. Introduction The basic unit of logic for the ispLSI 2000E, 2000VE and 2000VL device families is the Generic Logic Block GLB . Figure 1 illustrates the ispLSI 2128E with its 32 GLBs


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    PDF 2000E, 2000VE 2000VL 2128E 2032E t20ptxor) 2032VE

    44256 dram

    Abstract: reclaimer intel date code format 28F800B3 AT29C432 GF105 GM99
    Text: D Flash Data Integrator FDI User’s Guide July, 1997 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions


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    PDF 16-Mbit 2056K AP-604 AP-641 AP-642 44256 dram reclaimer intel date code format 28F800B3 AT29C432 GF105 GM99

    diode V105

    Abstract: v149 001C0 v248 003C6 v69 101 0038A 2777 diode v237 V199
    Text: Freescale Semiconductor, Inc. Order this document by EB372/D Motorola Semiconductor Engineering Bulletin Freescale Semiconductor, Inc. EB372 Template for Initializing the Exception Vector Table of CPU16-Based Devices By Charles Melear Motorola Microcontroller Division


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    PDF EB372/D EB372 CPU16-Based CPU16- diode V105 v149 001C0 v248 003C6 v69 101 0038A 2777 diode v237 V199

    PAL 012a

    Abstract: pal 010a P012C DSP56000UM AD03 APR11 DSP56000 DSP56001 MCM514256AP70 DL113
    Text: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. Motorola Digital Signal Processors DSP56001 Interface Techniques and Examples by Roman Robles Digital Signal Processor Operation MOTOROLA For More Information On This Product, Go to: www.freescale.com


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    PDF DSP56001 APR11 DSP56000UM/AD, 56-Bit DSP56001/D, DL138, MCM514256A DL113, AN986 PAL 012a pal 010a P012C DSP56000UM AD03 APR11 DSP56000 MCM514256AP70 DL113

    "XOR Gate"

    Abstract: 2032E 2128E 2032VE
    Text: ispLSI 2000E, 2000VE and 2000VL Family Architectural Description October 2001 Introduction The basic unit of logic for the ispLSI 2000E, 2000VE and 2000VL device families is the Generic Logic Block GLB . Figure 1 illustrates the ispLSI 2128E with its 32 GLBs labelled A0, A1 . D7. There are a total of eight GLBs in the


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    PDF 2000E, 2000VE 2000VL 2000VL 2128E 2032E t20ptxor) "XOR Gate" 2032VE

    PAL 012a

    Abstract: PAL 010a 6B0100 PAL 011a DSP56001 P012C 8A0000 DSP56000UM mcm412 pal 0097E
    Text: CT OR , IN C. 200 5 Freescale Semiconductor, Inc. MIC ON DU Freescale Semiconductor, Inc. Motorola Digital Signal Processors LE SE DSP56001 Interface Techniques and Examples CH IVE DB YF RE ES CA by Roman Robles Digital Signal Processor Operation AR MOTOROLA


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    PDF DSP56001 APR11 AN986 56-Bit DSP56001/D, PAL 012a PAL 010a 6B0100 PAL 011a P012C 8A0000 DSP56000UM mcm412 pal 0097E

    diode V105

    Abstract: V104 MOTOROLA V24 v149 001A4 v239 022A vector EB372 0006c
    Text: Order this document by EB372/D Motorola Semiconductor Engineering Bulletin EB372 Template for Initializing the Exception Vector Table of CPU16-Based Devices By Charles Melear Motorola Microcontroller Division Austin, Texas Introduction The assembly language program listed in this engineering bulletin is a


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    PDF EB372/D EB372 CPU16-Based CPU16- diode V105 V104 MOTOROLA V24 v149 001A4 v239 022A vector EB372 0006c

    ispLSI1000

    Abstract: 2032LV PT12 isplsi architecture
    Text: 2000 and 2000V Family Architectural Description global GLB clock input signals CLK0, CLK1, and CLK2. These three clocks are used for clocking all the GLBs configured as registers in the device. They feed directly to the GLB clock input via a clock multiplexer. CLK0 is


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    PDF

    Untitled

    Abstract: No abstract text available
    Text: D • A235bOS DDBlEEfl 1 M S I E G XX, , SIEMENS AKTIEN GE SEL LSCHAF T-52.-33-5S SAB 82289 Bus Arbiter for SAB 80286 Processors SAB 82289-6 up to 12 MHz SAB 82289 up to 16 MHz • S upports m u ltim aster system bus arbitration protocol • Synchronizes SAB 80286 processor w ith


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    PDF A235bOS -33-5S S07HOLD fl235b05 00312b! T-52-33-55 82289-P Q67020-Y77 82289-6-P Q67120-Y111

    BFG96

    Abstract: No abstract text available
    Text: P hilips Sem iconductor; bbS3T31 0031ST2 553 M A P X Product specification BFG96 NPN 5 GHz wideband transistor bit N AUER PHILIPS/5ISCRETE DESCRIPTION » PINNING NPN transistor in a 4-lead dual-emitter plastic SOU 03 envelope. DESCRIPTION PIN It is designed for application in


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    PDF bbS3T31 0031ST2 BFG96 BFG32. OT103. BFG96

    Untitled

    Abstract: No abstract text available
    Text: Or, Call Customer Service at 1-800-548-6132 USA Only B U R R - BROW N" E REF102 1 Precision VOLTAGE R EFER EN C E FEATURES APPLICATIONS • +10V ±0.0025V OUTPUT • VERY LOW DRIFT: 2.5ppm/°C max • EXCELLENT STABILITY: 5ppm/1 OOOhr typ • EXCELLENT LINE REGULATION:


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    PDF REF102 10ppm/mA 36VDC REF102s REF102S. REF102 REF102.

    DD312

    Abstract: ics 0741 D0312
    Text: KM616V1002A/AL E l C iv CMOS SRAM ELECTRONICS 6 4 K x 16 Bit High-Speed CMOS Static RAM 3.3V Operating FEATURES GENERAL DESCRIPTION • Fast Access Time 12,15,17,20 ns( Max. ) • Low Power Dissipation Standby (TTL) : 20m A(M ax.) (CMOS): 5m A(M ax.) 0.5 mA(Max.) ; L-veronly


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    PDF KM616V1002A/AL KM616V1002A/AL-12 KM616V1002A/AL-15: KM616V1002A/AL-17 KM616V1002A/AL-20 I/016 KM616V1002AJ/ALJ 44-S002 44-TSOP2-400F DD312 ics 0741 D0312

    Untitled

    Abstract: No abstract text available
    Text: OÌXYS Three-Phase VUC 36 Rectifier Bridges with Fast Diodes and "Softstart" Thyristor v RSM v BSM v RRM v DRM V V 1300 1500 1700 1200 1400 1600 "W i1t• VUC 36-12go2 VUC 36-14go2 VUC 36-16go2 ^TAVM T k = 85'C; module module T k = 85‘C; DC Maximum Ratings


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    PDF 36-12go2 36-14go2 36-16go2

    qml-38535

    Abstract: 54ACT74 CDFP2-F14 GDFP1-F14 smd diode marking jg 5962-8752501MCX
    Text: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED Technical and editorial changes throughout. Add vendor CAGE 04713 for device type 01. Add characterization for device classes B, S, Q and V. Add ground bounce and latch-up immunity characterization. Add 10.1


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    PDF 752S5 qml-38535 54ACT74 CDFP2-F14 GDFP1-F14 smd diode marking jg 5962-8752501MCX

    NPN transistor SST 117

    Abstract: No abstract text available
    Text: Philips Sem iconductors ^ b b 5 3 ^31 0 Q 3 1 cI b tl 5M 7 M APX Product specification NPN 9 GHz wideband transistor ^ ^ FEATURES ^ BFR540 • N AMER PHILIPS/DISCRETE bTE D PINNING PIN DESCRIPTION • High power gain • Low noise figure • High transition frequency


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    PDF BFR540 BFR540 NPN transistor SST 117