4eb85194
Abstract: TPUPN18 M111
Text: MOTOROLA Order this document by TPUPN18/D SEMICONDUCTOR PROGRAMMING NOTE Discrete Input/Output TPU Function DIO by Charles Melear 1 Functional Overview The discrete input/output (DIO) function allows the user to configure a time processor unit (TPU) channel as an input or output. As an input, the channel can be read at any time or sampled at a periodic rate.
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TPUPN18/D
4eb85194
TPUPN18
M111
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00FFFFF0
Abstract: M111
Text: MOTOROLA Freescale Semiconductor, Inc. Order this document by TPUPN18/D SEMICONDUCTOR PROGRAMMING NOTE Discrete Input/Output TPU Function DIO by Charles Melear 1 Functional Overview Freescale Semiconductor, Inc. The discrete input/output (DIO) function allows the user to configure a time processor unit (TPU) channel as an input or output. As an input, the channel can be read at any time or sampled at a periodic rate.
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TPUPN18/D
00FFFFF0
M111
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M111
Abstract: No abstract text available
Text: MOTOROLA TPUPN18/D SEMICONDUCTOR PROGRAMMING NOTE Discrete Input/Output TPU Function DIO By Charles Melear MOTOROLA Order this document by TPUPN18/D SEMICONDUCTOR PROGRAMMING NOTE Discrete Input/Output TPU Function (DIO) by Charles Melear 1 Functional Overview
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TPUPN18/D
M111
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M111
Abstract: 000050F4
Text: MOTOROLA Order this document by TPUPN18/D SEMICONDUCTOR PROGRAMMING NOTE Discrete Input/Output TPU Function DIO by Charles Melear 1 Functional Overview The discrete input/output (DIO) function allows the user to configure a time processor unit (TPU) channel as an input or output. As an input, the channel can be read at any time or sampled at a periodic rate.
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TPUPN18/D
M111
000050F4
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M111
Abstract: 1018a
Text: Freescale Semiconductor Order this document by TPUPN18/D Discrete Input/Output TPU Function DIO by Charles Melear 1 Functional Overview Freescale Semiconductor, Inc. The discrete input/output (DIO) function allows the user to configure a time processor unit (TPU) channel as an input or output. As an input, the channel can be read at any time or sampled at a periodic rate.
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TPUPN18/D
M111
1018a
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EPA424-100
Abstract: EPA424-125 EPA424-150 EPA424-175 EPA424-200 EPA424-25 EPA424-30 EPA424-35 EPA424-40 EPA424-45
Text: SO SMD 14 Pin 5 Tap TTL Compatible Active Delay Lines TAP DELAYS ±5% or ±2 nSt TOTAL DELAYS ±5% or +2 nSt 25 30 35 40 45 50 60 75 5, 10, 15, 20 6, 12, 18, 24 7, 14, 21, 28 8, 16, 24, 32 9, 18, 27, 36 1 0 ,2 0 ,3 0 ,4 0 12, 24, 36, 48 15, 30, 45, 60 fW hichever is greater.
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EPA424-25
EPA424-100
EPA424-30
EPA424-125
EPA424-35
EPA424-150
EPA424-40
EPA424-175
EPA424-45
EPA424-200
EPA424-100
EPA424-125
EPA424-150
EPA424-175
EPA424-200
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MO-108
Abstract: S2354 W25P222A
Text: Preliminary W25P222A IVinbond Electronics Corp. 64K x 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM GENERAL DESCRIPTION The W25P222A is a high-speed, low-power, synchronous-burst pipelined CMOS static RAM organized as 65,536 x 32 bits that operates on a single 3.3-volt power supply. A built-in two-bit burst
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W25P222A
W25P222A
MO-108
S2354
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Untitled
Abstract: No abstract text available
Text: • 51343GD M.S.KENNEDY CORP. □□□□505 7DM ■ ISO-9001 CERTIFIED BY DESC HIGH EFFICIENCY, 4 AMP STEP-DOWN SWITCHING REGULATORS 5030 SERIES 315 699-9201 8170 Thompson Road Cicero, N.Y. 13039 FEATURES: • • • • • • • • MIL-PRF-38534 QUALIFIED
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51343GD
ISO-9001
MIL-PRF-38534
300KHz
MSK5030-3
MIL-PRF-38534
00D0510
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Untitled
Abstract: No abstract text available
Text: AVG Semiconductors DDr Technical Data Available Q2, 1995 DV74HC279 DV74HCT279 Quad Set-Reset Latch This device consists of four independent set-reset input latches. Each latch has its normal output available. Two latches have two seperate sets available. •
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DV74HC279
DV74HCT279
AVG-003
AVG-004
DV74HC279,
1-800-AVG-SEMI
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raaam
Abstract: No abstract text available
Text: VME 3000/3010 VMEbus _ Interrupt Generator Septem ber 1989 P L X TECHNOLOGY CORP MbE D • 0 0 0 0 2 0 0 1 ■ PLX Distinctive Features_ Applications_ T =:5 ^ ' 3 & - / 3 • • • • • • •
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24-Lead
28-Pin
DGD02S2
24-Pin
10TYP
raaam
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82C802G
Abstract: opti 82C802 82C802 OPTi chipset 486 82c602 82C601 486dx isa bios opti opti 486 chipset cyrix 486 "AMD 486DX"
Text: r a r i lu í i w M m j 82C802G System/Power Management Controller 1.0 Features • Processor interface: - Intel 80486SX, DX, DX2, SLe, DX4, P24T, P24D - - AMD® 486DX, DX2, DXL, DXL2, Plus - Cyrix® DX, DX2, M7 - CPU frequencies supported 20, 25, 33, 40 and 50MHz
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82C802G
80486SX,
486DX,
50MHz
33MHz
128MB
256KB,
82C802G
opti 82C802
82C802
OPTi chipset 486
82c602
82C601
486dx isa bios opti
opti 486 chipset
cyrix 486
"AMD 486DX"
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photo thyristor
Abstract: MT6450G Photo-Thyristor MTPC5410G VDE0110
Text: MARKTECH INTERNATIONAL 1ÖE D • S?mSS 0GDG5QS T PHOTO THYRISTOR COUPLER MT6450G T Mi-a.7 APPLICATIONS • OFFICE MACHINERY • HOUSEHOLD APPLIANCES • SOLID STATE RELAY • SWITCHING POWER SUPPLY • OVERVOLTAGE/CURRENT DETECTOR CIRCUIT The MARKTECH MT6450G consists of a
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MT6450G
MT6450G
150mA
5000Vrms
IEC380/VDE0806
photo thyristor
Photo-Thyristor
MTPC5410G
VDE0110
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Untitled
Abstract: No abstract text available
Text: m m m sx CS240610 CS241210 Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 412 925-7272 Fast Recovery Single Diode Modules 100 Amperes/600-1200 Volts Description: OUTLINE DRAWING -— D— I-1 I UM J / ln CONNECTION DIAGRAM CS240610, CS241210
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CS240610
CS241210
Amperes/600-1200
CS240610,
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Untitled
Abstract: No abstract text available
Text: Preliminary W25P222A IVinbond Electronics Corp. 64K x 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM GENERAL DESCRIPTION The W25P222A is a high-speed, low-power, synchronous-burst pipelined CMOS static RAM organized as 65,536 x 32 bits that operates on a single 3.3-volt power supply. A built-in two-bit burst
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W25P222A
W25P222A
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Untitled
Abstract: No abstract text available
Text: IMISC407 September 1993 PRODUCT FEA TURES • Generates All Essential Clock Signals for the Motherboards ■ 4V to 7V Operating Supply Range ■ Supports 8086, 80286, 80386 and 80486 Based Designs ■ Integrates Keyboard Clock, CPU Clocks and Buffered 14.318
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IMISC407
00005TB
IMISC407XPB
IMISC407XXB
SC407XPB
IMISC407
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capacitor PMR 202 DM
Abstract: act30b 41516 BC 550 c3 xc PM4341A-RI PM4341A SLC96 TR-TSY-000008 voice transcever circuit diagram TR-TSY-000312
Text: PMC-Sierra, Inc. PM4341A T1XC ISSUE 6 T1 FRAMER/TRANSCEIVER FEATURES • Integrates a full-featured T1 framer and line interface in a single device with analog circuitry for receiving and transmitting DSX-1 compatible signals and digital circuitry for terminating the duplex DS-1 signal.
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PM4341A
PMC-900602
PMC-891007
capacitor PMR 202 DM
act30b
41516
BC 550 c3 xc
PM4341A-RI
SLC96
TR-TSY-000008
voice transcever circuit diagram
TR-TSY-000312
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Untitled
Abstract: No abstract text available
Text: GEC P L E S S E Y S E M I C O N D S IS D • 3 7 bfiSBE aOOflSDS 7 M P L S E P L E S S E Y # S e m ic o n d u c to r s m -— n .-n■■.■■■■n«i i — T -S B -0 7 REF25/REF25Z 2.5V MICROPOWER PRECISION REFERENCES The REF25 and REF25Z are integrated circuits using the
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REF25/REF25Z
REF25
REF25Z
60//A
000050b
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Untitled
Abstract: No abstract text available
Text: NN514170 series Fast Page Mode CMOS 256K X 16bit Dynamic RAM NPN>Â< DESCRIPTION The NN514170 series is a high performance CMOS Dynamic Random Access Memory organized as 262,144 words by 16 bits. The NN514170 series is fabricated with advanced CMOS technology and designed
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NN514170
16bit
NN514170L
NN514170XXI
128ms
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100el34
Abstract: No abstract text available
Text: * Clockworks +2, -4, -8 CLOCK GENERATION CHIP SYNERGY ADVANCE INFORMATION SY10/100EL34 SEMICONDUCTOR DESCRIPTION FEATURES The SY10EL/100EL34 are low skew -$-2, +4, +8 clock generation chips designed explicitly for low skew clock g e n e ra tio n a p p lic a tio n s .
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SY10/100EL34
SY10EL/100EL34
SY10EL34ZC
Z16-1
SY100EL34ZC
000050b
100el34
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din 41814
Abstract: EUPEC T 1078 F eupec TD 42 F 10 T128F T318F 074c
Text: EUPEC S2E T> 34032^7 00G0SD3 Ö43 • UPEC T 388 S -Z S -/9 Typenreihe/Type range 600 800 900 1000 1100 1200* Elektrische Eigenschaften Electrical properties H ö c h s tz u lä s s ig e W e rte M a x im u m p e rm is s ib le v a lu e s Vd rm V rrm 600. .1200
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T-91-20
din 41814
EUPEC T 1078 F
eupec TD 42 F 10
T128F
T318F
074c
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