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DSA00388340.pdf
Manufacturer
Xilinx
Partial File Text
Application Note: Virtex-II Pro Family R High-Speed Clock Architecture for DDR Designs Using Local Inversion XAPP685 (v1.3) March 4, 2005 Summary The VirtexTM-II Pro family meets the req
Datasheet Type
Original
ECAD Model
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2VP20
CLK180
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