DSA00388406.pdf by Xilinx

Partial File Text Application Note: Virtex-5 FPGAs 16-Channel, DDR LVDS Interface with Per-Channel Alignment R XAPP855 (v1.0) October 13, 2006 Author: Greg Burton Summary This application note descri
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
Price & Stock Find it at Findchips.com

DSA00388406.pdf preview

Download Datasheet

User Tagged Keywords

FIFO18 iodelay ISERDES ML550 OSERDES PRBS23 XAPP855 XAPP860

Price & Stock Powered by