DSA00300735.pdf by Cypress Semiconductor

Partial File Text PRELIMINARY CY2SSTU32864 1.8V, 25-bit (1:1) or 14-bit (1:2) JEDEC-Compliant Data Register Features · · · · · · Operating frequency: DC to 500 MHz Supports DDRII SDRAM Two operations
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RoHS Unknown
Pb Free Unknown
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BA96A CY2SSTU32864 CY2SSTU32864BVXI CY2SSTU32864BVXIT Q15-25 t1 96x