DASF001105.pdf by Cypress Semiconductor

Partial File Text CY7C1166V18, CY7C1177V18 CY7C1168V18, CY7C1170V18 18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) Features Functional Description 18 Mbit density (2M x 8, 2M x
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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CY7C1166V18 CY7C1168V18 CY7C1170V18 CY7C1177V18