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    XRT71D00IQ Search Results

    XRT71D00IQ Datasheets (5)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    XRT71D00IQ Exar DS3/E3 JITTER ATTENUATOR IC Original PDF
    XRT71D00IQ Exar E3/DS3/STS-1 JITTER ATTENUATOR,STS-1 TO DS3 DESYNCHRONIZER Original PDF
    XRT71D00IQ32 Exar DS3/E3 JITTER ATTENUATOR IC Original PDF
    XRT71D00IQ-F Exar Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers, Integrated Circuits (ICs), IC JITTER ATTENUATOR SGL 32TQFP Original PDF
    XRT71D00IQTR-F Exar Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers, Integrated Circuits (ICs), IC JITTER ATTENUATOR SGL 32TQFP Original PDF

    XRT71D00IQ Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    850C

    Abstract: GR-253 GR-499-CORE TBR24 XRT71D00 XRT71D00IQ 58438 31314
    Text:  XRT71D00 E3/DS3/STS-1 JITTER ATTENUATOR,STS-1 TO DS3 DESYNCHRONIZER JULY 2000 REV. 1.01 GENERAL DESCRIPTION The XRT71D00 is a single channel, single chip Jitter Attenuator, that meets the Jitter requirements specified in the ETSI TBR-24, Bellcore GR-499 and GR253 standards.


    Original     		PDF XRT71D00 XRT71D00 TBR-24, GR-499 GR253 GR-253 TBR24 850C GR-499-CORE TBR24 XRT71D00IQ 58438 31314

    role of microprocessor

    Abstract: DS3 multiplex demultiplex 850C CR21 GR-499-CORE TBR24 XRT71D00 XRT7300 E3 multiplex demultiplex
    Text: áç XRT71D00 PRELIMINARY DS3/E3 JITTER ATTENUATOR IC FEBRUARY 2000 REV. P1.0.0 GENERAL DESCRIPTION • Selectable buffer size of 16 and 32 bits The XRT71D00 is a single chip IC which accepts “jittery” clock and data signals from a LIU, internally reduces and smooths the clock and data jitter, then ouputs the smoothed data to the Terminal Equipment.


    Original     		PDF XRT71D00 XRT71D00 TBR24 34Mbit/s role of microprocessor DS3 multiplex demultiplex 850C CR21 GR-499-CORE XRT7300 E3 multiplex demultiplex

    Untitled

    Abstract: No abstract text available
    Text: áç XRT71D00 E3/DS3/STS-1 JITTER ATTENUATOR SEPTEMBER 2001 REV. 1.2.0 GENERAL DESCRIPTION The XRT71D00 is a single channel, single chip Jitter Attenuator, that meets the Jitter transfer characteristic requirements specified in the ETSI TBR-24, Bellcore GR-499-CORE and GR-253-CORE standards.


    Original     		PDF XRT71D00 XRT71D00 TBR-24, GR-499-CORE GR-253-CORE GR499-CORE

    850C

    Abstract: GR-253-CORE GR-499-CORE TBR24 XRT71D00 XRT71D00IQ PLL IC 566 2609 al
    Text: áç XRT71D00 E3/DS3/STS-1 JITTER ATTENUATOR SEPTEMBER 2001 REV. 1.2.0 GENERAL DESCRIPTION The XRT71D00 is a single channel, single chip Jitter Attenuator, that meets the Jitter transfer characteristic requirements specified in the ETSI TBR-24, Bellcore GR-499-CORE and GR-253-CORE standards.


    Original     		PDF XRT71D00 XRT71D00 TBR-24, GR-499-CORE GR-253-CORE TBR24 GR-253CORE 850C TBR24 XRT71D00IQ PLL IC 566 2609 al

    T7100

    Abstract: C157 TANT01 ICT R7 HCT244 P300 XRT71D00 XRT7300 P30012 BG1A
    Text: A B C D +3.3V GND +5V DB25 P8 P3 P1 P2 1 1 1 1 14 2 15 3 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 + 500 R11 R7 + X6 X5 X4 5 5 0.1uF C13 3.9V ZDIODE D5 0.1uF C7 0.1uF C2 0.1uF C3 VDD HOST MODE RESET SWITCH RESET SWSPDT R14 22K SMDRC VDD 5 4 2 3


    Original     		PDF HCT244 T71D00 RT71D00 T7100 C157 TANT01 ICT R7 HCT244 P300 XRT71D00 XRT7300 P30012 BG1A

    CR21

    Abstract: GR-499-CORE TBR24 XRT71D00 XRT7300 XRT7302 XRT73L03 role of microprocessor
    Text:  XRT71D00 PRELIMINARY DS3/E3 JITTER ATTENUATOR IC OCTOBER 1999 REV. 1.0.6 FEATURES • Meets output jitter generation requirement as spec- ified by ETSI TBR24 • A single-chip that does the following: • Accepts “jittery” clock and data from an LIU IC


    Original     		PDF XRT71D00 TBR24 TBR24 34Mbit/s XRT71D00ID XRT71D00IQ32 CR21 GR-499-CORE XRT71D00 XRT7300 XRT7302 XRT73L03 role of microprocessor