STACK ORGANISATION
Abstract: l67201 67202
Text: L 67201/L 67202 MATRA MHS 512 x 9 & 1K × 9 / 3.3 Volts CMOS Parallel FIFO Introduction The L67201/202 implement a first-in first-out algorithm, featuring asynchronous read/write operations. The FULL and EMPTY flags prevent data overflow and underflow. The Expansion logic allows unlimited expansion in word
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67201/L
L67201/202
STACK ORGANISATION
l67201
67202
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S7-17-8
Abstract: 1000-01P
Text: MIL-DTL-38999 Connectors 180-091 S7 - Square Flange Wall Mount Advanced Fiber Optic Receptacle Connector MIL-DTL-38999 Series III Style with Slotted Holes 180-091 XW S7-17-8 P N Alternate Key Position per MIL-DTL-38999 A, B, C, D, or E (N = Normal) Product Series
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MIL-DTL-38999
MIL-DTL-38999
S7-17-8
1000-01P
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Untitled
Abstract: No abstract text available
Text: Environmental Connectors 233-105-00 MIL-DTL-38999 Series III Type Wall Mount Environmental Receptacle Connector Shell Size 09 = A 11 = B 13 = C 15 = D 17 = E 19 = F 21 = G 23 = H 25 = J Basic Part Number 233-105 - D38999 Series III Type Power Connector Finish Material
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MIL-DTL-38999
D38999
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D-12
Abstract: D38999
Text: Environmental Connectors 233-105-00 MIL-DTL-38999 Series III Type Wall Mount Environmental Receptacle Connector Shell Size 09 = A 11 = B 13 = C 15 = D 17 = E 19 = F 21 = G 23 = H 25 = J Basic Part Number 233-105 - D38999 Series III Type Power Connector Finish Material
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MIL-DTL-38999
D38999
D-12
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PDF
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Untitled
Abstract: No abstract text available
Text: Environmental Connectors 233-105-00 MIL-DTL-38999 Series III Type Wall Mount Environmental Receptacle Connector Shell Size 09 = A 11 = B 13 = C 15 = D 17 = E 19 = F 21 = G 23 = H 25 = J Basic Part Number 233-105 - D38999 Series III Type Power Connector Finish Material
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Original
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MIL-DTL-38999
D38999
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PDF
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Untitled
Abstract: No abstract text available
Text: Environmental Connectors 233-105-00 MIL-DTL-38999 Series III Type Wall Mount Environmental Receptacle Connector Shell Size 09 = A 11 = B 13 = C 15 = D 17 = E 19 = F 21 = G 23 = H 25 = J Basic Part Number 233-105 - D38999 Series III Type Power Connector Finish Material
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MIL-DTL-38999
D38999
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Sunplus SPF
Abstract: SPFA64A LM386
Text: S PFA64A SP 64K Music Synthesizer OCT. 05, 2001 Version 1.3 SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO. is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document.
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SPFA64A
Sunplus SPF
SPFA64A
LM386
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84L14
Abstract: TR54016 TR62411 XRT84L14IQ XRT84V24 T1-403-1995 GPI06
Text: áç XRT84L14 PRODUCT BRIEF QUAD T1 FRAMER OCTOBER 2000 REV. A1.0.0 GENERAL DESCRIPTION Monitor, Bit Error Rate BER meter, and forced error insertion. The XRT84L14 quad T1/DS1 Framer is a single chip device which integrates 4 T1 framers and transmitters
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XRT84L14
XRT84L14
512-bit
84L14
TR54016
TR62411
XRT84L14IQ
XRT84V24
T1-403-1995
GPI06
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PDF
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Untitled
Abstract: No abstract text available
Text: L8C2Q1/2Q2/2Q3/2Q4 L8C201/202/203/204 im 512/1K/2K/4K x 9-bit Asynchronous FIFO DEVICES INCORPORATED FEATURES_ _ □ First-In/First-Out FIFO using Dual-Port Memory □ Advanced CMOS Technology □ High Speed — to 10 ns Access Time □ Asynchronous and Simultaneous
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L8C201/202/203/204
512/1K/2K/4K
IDT720x,
KM75C0x
28-pin
32-pin
L8C201,
L8C202,
L8C203,
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Untitled
Abstract: No abstract text available
Text: L8C201/202/203/204 l o g ic 512/1K/2K/4K x 9-bit Asynchronous FIFO DEVICES INCORPORATED FEATURES_ DESCRIPTION □ First-In/First-Out FIFO using Dual-Port Memory □ Advanced CMOS Technology □ High Speed — to 10 ns Access Time □ Asynchronous and Simultaneous
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L8C201/202/203/204
512/1K/2K/4K
IDT720x,
KM75C0x
L8C202
28-pin
32-pin
L8C201,
L8C202,
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PDF
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Untitled
Abstract: No abstract text available
Text: Tem ic L 67201/L 67202 MATRA MHS 512 x 9 & 1K x 9 / 3.3 Volts CMOS Parallel FIFO Introduction The L67201/202 implement a first-in first-out algorithm, featuring asynchronous read/write operations. The FULL and EMPTY flags prevent data overflow and underflow.
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67201/L
L67201/202
00QSS7L
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PDF
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY muMHS DATA SHEET_ _ L March 1994 6 7 2 0 1 /L 6 7 2 0 2 512x9 & 1Kx 9 / 3 . 3 VOLTS CMOS PARALLEL FIFO FEATURES . . . . . . . FIRST-IN FIRST-OUT DUAL PORT MEMORY SINGLE SUPPLY 3.3 ±0.3 VOLTS 512 x 9 ORGANISATION L 67201 1024 x 9 ORGANISATION (L 67202)
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512x9
67201L/202L
7201V/202V
67201/L
67202/R
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Untitled
Abstract: No abstract text available
Text: L O G IC L 8 C 2 0 1 /2 0 2 /2 0 3 /2 0 4 512/1K/2K/4K x 9-bit Asynchronous FIFO mw DEVICES INCORPORATED DESCRIPTION FEATURES □ First-In/First-Out FIFO using Dual-Port Memory □ Advanced CMOS Technology □ High Speed — to 10 ns Access Time □ Asynchronous and Simultaneous
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OCR Scan
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512/1K/2K/4K
28-pin
32-pin
L8C201
L8C201,
L8C202,
L8C203,
L8C204
L8C204JC25
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Untitled
Abstract: No abstract text available
Text: TO SHIBA TMP47P202V CMOS 4-Bit Microcontroller TMP47P202VP TMP47P202VM The 47P202V is the system evaluation LSI of 47C102/202 with 16K bits one-time PROM. The 47P202V programs/verifies using an adapter socket to connect with PROM programmer, as it is in TMM27256AD.
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TMP47P202V
TMP47P202VP
TMP47P202VM
47P202V
47C102/202
47P202V
TMM27256AD.
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47C202
Abstract: 47C102
Text: TO SHIBA TMP47P202V CMOS 4-BIT MICROCONTROLLER TMP47P202VP TMP47P202VM The 47P202V is the system evaluation LSI of 47C102/202 with 16K bits one-time PROM. The 47P202V programs/verifies using an adapter socket to connect with PROM programmer, as it is in TMM27256AD.
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TMP47P202V
TMP47P202VP
TMP47P202VM
47P202V
47C102/202
TMM27256AD.
47C202
47C102
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Untitled
Abstract: No abstract text available
Text: 256/512/1 K/2 K/4 K x 9-bit First-In/First-Out FIFO L8C200/201 L8C202/203/204 DESCRIPTION FEATURES □ F irst-In /F irst O ut (FIFO ) using D ual-Port M em ory □ High Speed — to l5 ns A ccess Tim e □ A sychronous and Sim ultaneous Read and W rite □ Fully E xpand able by both W ord
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T720x,
75C0x
28-pin
32-pin
L8C200/201
L8C202/203/204
L8C200,
L8C202,
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Untitled
Abstract: No abstract text available
Text: 2bE D LO GI C D E V I CE S INC • 256/512/1K/2K/4K x 9-bit First-In/First-Out FIFO 55bSTOS Q G G l l S b fl ■ _ T - 9 d~3 S ~ L8C200/201 L8C202/203/204 DESCRIPTION FEATURES □ First-In/First Out (FIFO) using Dual-Port Memory Q Highspeed — tol5 ns Access Time
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256/512/1K/2K/4K
55bSTOS
L8C200/201
L8C202/203/204
IDT720x,
KM75C0X
28-pin
32-pin
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TMP47C102
Abstract: TMP47C102M TMP47C102P TMP47C202M TMP47C202P TMP47P202VM TMP47P202VP
Text: TO SH IB A TMP47C102/202 CMOS 4-Bit Microcontroller TMP47C102P, TMP47C202P TMP47C102M, TMP47C202M The TMP47C102/202 are high speed and high performance 4-bit single chip microcomputers, integrating ROM, RAM, input / output ports and timer / counters on a chip. The TMP47C102/202 are the standard LSI in
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TMP47C102/202
TMP47C102P,
TMP47C202P
TMP47C102M,
TMP47C202M
theTLCS-47E
TMP47C102P
P-DIP20-300-2
TMP47C102
TMP47C102M
TMP47P202VM
TMP47P202VP
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47c202
Abstract: BM1187 27256 R4945 tmm27256ad 47C102 DIP20-P-300-2 TMP47P202VM TMP47P202VP
Text: TO SHIBA TMP47P202V CMOS 4-BIT MICROCONTROLLER TMP47P202VP TMP47P202VM The 47P202V is the system evaluation LSI of 47C102/202 with 16K bits one-time PROM. The 47P202V programs/verifies using an adapter socket to connect with PROM programmer, as it is in TMM27256AD.
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P47P202V
TMP47P202VP
TMP47P202VM
47P202V
47C102/202
TMM27256AD.
47c202
BM1187
27256
R4945
tmm27256ad
47C102
DIP20-P-300-2
TMP47P202VM
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Untitled
Abstract: No abstract text available
Text: 4 3 THIS DRAWING IS UNPUBLISHED. D COPYRIGHT N /A RELEASED FOR PUBLICATION 2 N /A , N /A . ALL RIGHTS RESERVED. BY TYCO ELECTRONICS CORPORATION. COMPONENT MATERIAL COUPLING NUT STAINLESS STEEL PER ASTM—A—484 OR ASTM-A-582 TYPE 303 DIELECTRIC PTFE FLUORCARBON
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ASTM-A-582
M3901
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Untitled
Abstract: No abstract text available
Text: SPECIFICATION CONTROL DRAWING 1. MATING 2. INTERFACE DIMENSIONS PER M I L - S T D - 348A Fig. 3 0 4 -1 , TYPE "N " PL U G ELECTRICAL DC TO 11.0 GHz. 1.07 + .008 FGHz. .06 dB x n/FGH z . 50 500 100 dB - FGHz. - 6 5 ° c TO + 1 6 5 ° c 1,500 FREQUENCY RANGE G H z -VSWR (M A X ) * -INSERTION LOSS (d B M AX ) * -NOMINAL IMPEDANCE (OHMS)-VOLTAGE RATING (MAX VRMS)-RF LEAKAGE (MIN. dB D O W N )-TEMPERATURE RATING (DEGREES CENTIGRADE)—
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-P-35A,
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RG-188
Abstract: No abstract text available
Text: DRAWING THIS MADE DRAWI NG IN 15 4 THIRD ANGLE UNPUBL I SHED COPYRIGHT 19 RELEASED BY ANP 2 3 PROJECTION <3> FOR P U B L I C A T I O N INCORPORATED. ALL INTERNATIONAL RIGHTS DI ST LOC 19 REV I 5 I ON' xo DF RESERVED. LTR ZONE DESCRIRTION REV PER 2 4 . 2 8 MAX
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0G3D-0395-01
RG-142X0,
142AXU
58AX0
400X0,
142BXU
RG-178XU
178AXU
178B/U
RG-188
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PDF
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Untitled
Abstract: No abstract text available
Text: 4 T H IS D R A W IN G IS U N P U B L IS H E D . RELEASED FO R C O P Y R IG H T N /A B Y TYCO E LE C TR O N IC S COMPONENT N /A P U B L IC A T IO N A LL R IG H T S — — LOC D IS T DF R E V I S I ON S xo LTR FI N I S H A PASSIVATED PER A S T M —A —5 8 0
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39012/57B
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Untitled
Abstract: No abstract text available
Text: High Speed CMOS 3.3V 16-Bit Register 3-State With Output Resistor and Bus Hold Q u a l it y S em ic o n d u c to r , I n c . QS74LCX162H374 FEATURES/BENEFITS DESCRIPTION • • T he LC X 162H 374 is a 16-bit buffered register w ith three-state outputs that is ideal for driving address
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16-Bit
QS74LCX162H374
MDSL-00219-01
QS74LCX
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