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    XC2S50E Datasheets (48)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    XC2S50E Xilinx Spartan-IIE 1.8V FPGA Family Original PDF
    XC2S50E-6FG456C Xilinx Spartan-IIE 1.8V FPGA Family Original PDF
    XC2S50E-6FG456I Xilinx Spartan-IIE 1.8V FPGA Family Original PDF
    XC2S50E-6FT256C Xilinx Spartan-IIE 1.8V FPGA. Original PDF
    XC2S50E-6FT256C Xilinx 50,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN Original PDF
    XC2S50E-6FT256I Xilinx 50,000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN Original PDF
    XC2S50E-6FT256I Xilinx Spartan-IIE 1.8V FPGA. Original PDF
    XC2S50E-6FT456C Xilinx Spartan-IIE 1.8V FPGA. Original PDF
    XC2S50E-6FT456I Xilinx Spartan-IIE 1.8V FPGA. Original PDF
    XC2S50E-6FTG256C Xilinx Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 182 I/O 256FTBGA Original PDF
    XC2S50E-6FTG256C Xilinx 50,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN Original PDF
    XC2S50E-6FTG256I Xilinx Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 182 I/O 256FTBGA Original PDF
    XC2S50E-6FTG256I Xilinx 50,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN Original PDF
    XC2S50E-6PQ208C Xilinx Spartan-IIE 1.8V FPGA. Original PDF
    XC2S50E-6PQ208C Xilinx Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 146 I/O 208PQFP Original PDF
    XC2S50E-6PQ208C Xilinx 50,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN Original PDF
    XC2S50E-6PQ208I Xilinx 50,000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN Original PDF
    XC2S50E-6PQ208I Xilinx Spartan-IIE 1.8V FPGA. Original PDF
    XC2S50E-6PQ208I Xilinx Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 146 I/O 208PQFP Original PDF
    XC2S50E-6PQG208C Xilinx 50,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN Original PDF

    XC2S50E Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    XC17S200APD8C

    Abstract: SPARTAN XC2S50 XC17S00A XC2S100 XC2S100E XC2S15 XC2S150 XC2S150E XC2S200 XC2S30
    Text: Spartan-II/Spartan-IIE Family of One-Time Programmable Configuration PROMs R DS078 v1.5 November 15, 2001 5 Advance Product Specification Features • Configuration one-time programmable (OTP) read-only memory designed to store configuration bitstreams for


    Original     		PDF DS078 20-pin 44-pin XC17S200APD8C SPARTAN XC2S50 XC17S00A XC2S100 XC2S100E XC2S15 XC2S150 XC2S150E XC2S200 XC2S30

    xc2s300e pinouts

    Abstract: LP1-D12 L43P xc2s300e l36n xc2s50e L26N L28N XC2S200E L18P
    Text: Spartan-IIE 1.8V FPGA Family: Pinout Tables R DS077-4 v1.0 November 15, 2001 Preliminary Product Specification Pin Definitions Dedicated Pin Direction Description GCK0, GCK1, GCK2, GCK3 No Input Clock input pins that connect to Global Clock buffers. These pins


    Original     		PDF DS077-4 thT11 DS001-1, DS001-2, DS001-3, DS001-4, xc2s300e pinouts LP1-D12 L43P xc2s300e l36n xc2s50e L26N L28N XC2S200E L18P

    SPARTAN XC2S50

    Abstract: 18V02 xilinx 8 pin dip Xilinx XC2V500 XILINX SPARTAN XC2S50 18V512 18V00 SPARTAN 6 Configuration FPGA Virtex 6 pin configuration 17S00A
    Text: Xilinx Configuration PROMs XC18V00, XC17V00, XC17S00 FPGA Configuration PROMs 180V00 PROM Family Based on the Xilinx state-of-the-art ISP PROM architecture and manu- • PROM-triggered FPGA reconfiguration via JTAG factured on an advanced 0.35m • Up to 264 MHz configuration speed


    Original     		PDF XC18V00, XC17V00, XC17S00 180V00 18V00 256Kb 44-pin 20-pin SPARTAN XC2S50 18V02 xilinx 8 pin dip Xilinx XC2V500 XILINX SPARTAN XC2S50 18V512 SPARTAN 6 Configuration FPGA Virtex 6 pin configuration 17S00A

    qfn 3x3 tray dimension

    Abstract: XCDAISY BFG95 XC5VLX330T-1FF1738I pcb footprint FS48, and FSG48 WS609 jedec so8 Wire bond gap XC3S400AN-4FG400I FFG676 XC4VLX25 cmos 668 fcbga
    Text: Device Package User Guide [Guide Subtitle] [optional] UG112 v3.5 November 6, 2009 [optional] R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the


    Original     		PDF UG112 UG072, UG075, XAPP427, qfn 3x3 tray dimension XCDAISY BFG95 XC5VLX330T-1FF1738I pcb footprint FS48, and FSG48 WS609 jedec so8 Wire bond gap XC3S400AN-4FG400I FFG676 XC4VLX25 cmos 668 fcbga

    Untitled

    Abstract: No abstract text available
    Text: Spartan-IIE 1.8V FPGA Automotive IQ Product Family: Introduction and Ordering R DS106-1 v1.5 July 16, 2003 Advance Product Specification Introduction The Spartan -IIE 1.8V Field-Programmable Gate Array family gives users high performance, abundant logic


    Original     		PDF DS106-1 bS400-E XC2S600-E FG676 FG676â

    3014 LED

    Abstract: SPARTAN XC2S50 XAPP176 XAPP188 XC2S100 XC2S100E XC2S15 XC2S150 XC2S200 XC2S30
    Text: Application Note: Spartan-II and Spartan-IIE Families Configuration and Readback of Spartan-II and Spartan-IIE FPGAs Using Boundary Scan R XAPP188 v2.2 June 24, 2005 Summary This application note demonstrates using a Boundary-Scan (JTAG) interface to configure and


    Original     		PDF XAPP188 XAPP176: XAPP176 org/cspress/catalog/st01096 3014 LED SPARTAN XC2S50 XAPP188 XC2S100 XC2S100E XC2S15 XC2S150 XC2S200 XC2S30

    H16550

    Abstract: xilinx asynchronous fifo baud rate generator vhdl XC2V80 XC2S50E-7
    Text: H16550 - Universal Asynchronous Receiver/Transmitter with FIFOs April 5, 2002 Product Specification AllianceCORE Facts Core Specifics See Table 1 Provided with Core Documentation Core documentation EDIF Netlist; VHDL Source RTL Design File Formats available at extra cost


    Original     		PDF H16550 xilinx asynchronous fifo baud rate generator vhdl XC2V80 XC2S50E-7

    8250 uart block diagram

    Abstract: 8250 uart block diagram UART using VHDL fifo generator xilinx spartan synchronous fifo design in verilog XILINX FIFO UART asynchronous fifo vhdl xilinx fifo design in verilog MC8250 xilinx fifo 9.3
    Text: MC-XIL-UART Asynchronous Communications Core May 20, 2002 Product Specification AllianceCORE Facts Core Specifics See Table 1 Provided with Core 0HPHF&RUH Documentation Design File Formats Verification TM Product Line 9980 Huennekens Street San Diego, CA 92121


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: — OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE — Spartan-IIE FPGA Family Data Sheet R DS077 August 9, 2013 Product Specification This document includes all four modules of the Spartan -IIE FPGA data sheet. Module 1: Introduction and Ordering Information


    Original     		PDF DS077 DS077-1 DS077-3 DS077-2 XC2S400E XC2S600E FG676. FT256 XC2S50E XCN12026.

    BGA and QFP Package

    Abstract: spartan 2 XC2S50E FTG256 XC2S100E XC2S150E XC2S200E XC2S300E resistor 56k DS077
    Text: 05 Spartan-IIE 1.8V FPGA Family: Introduction and Ordering Information R DS077-1 v2.2 July 28, 2004 Introduction Product Specification • The Spartan -IIE 1.8V Field-Programmable Gate Array family gives users high performance, abundant logic resources, and a rich feature set, all at an exceptionally low


    Original     		PDF DS077-1 DS077-3, DS077-4, XC2S400E XC2S600E. XC2S150E XC2S50E BGA and QFP Package spartan 2 XC2S50E FTG256 XC2S100E XC2S200E XC2S300E resistor 56k DS077

    LM3874-Adj

    Abstract: N CHANNEL MOSFET 10A 1000V CoolRunner-II CPLD LM2727 LM2737 LM2742 LM2743 LM2744 LM2745 LM2746
    Text: 適用於 Xilinx FPGA 的模擬技術設計指南 Power Expert . . 2 適用於 FPGA 的電源 管理解決方案 . . 3-19 適用於 FPGA 的高速 接口解決方案 . . 20-21 適用於 FPGA 及 CPLD 的 JTAG 測試方案 . 22-23


    Original     		PDF OT-223 OT-23 O-220 O-263 LM3874-Adj N CHANNEL MOSFET 10A 1000V CoolRunner-II CPLD LM2727 LM2737 LM2742 LM2743 LM2744 LM2745 LM2746

    do214

    Abstract: T1 6C6 smd A12 5PIN smd z17 smd A13 5pin XC2S50 driver CON12P F1333 Transistor 5C5 Transistor 8c4
    Text: DS21Q55DK Quad T1/E1/J1 Transceiver Design Kit Daughter Card www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS21Q55DK is an easy-to-use evaluation board for the DS21Q55 quad T1/E1/J1 transceiver. The DS21Q55DK is intended to be used as a daughter card with the DK101 motherboard or the DK2000


    Original     		PDF DS21Q55DK DS21Q55DK DS21Q55 DK101 DK2000 DK101/DK2000 do214 T1 6C6 smd A12 5PIN smd z17 smd A13 5pin XC2S50 driver CON12P F1333 Transistor 5C5 Transistor 8c4

    LM3874-Adj

    Abstract: LM3671 operational amplifier discrete schematic SCANSTA111 LP2985 LM2671 lm3485 LP3874-ADJ LM3874 SPARTAN-3 XC3S400
    Text: Analog Design Guide for Xilinx FPGAs Power Expert . 2 Power Management Solution for FPGAs . 3-19 High-Speed Interface Solution for FPGAs . 20-21 JTAG for FPGAs . 22-23 High-speed ADCs for FPGAs . 24-25


    Original     		PDF O-220 O-263 OT-23 LM3874-Adj LM3671 operational amplifier discrete schematic SCANSTA111 LP2985 LM2671 lm3485 LP3874-ADJ LM3874 SPARTAN-3 XC3S400

    XC17S200APD8C

    Abstract: XC17S00A XC2S100 XC2S100E XC2S15 XC2S150 XC2S200 XC2S30 XC2S50 XC2S50E
    Text: Spartan-II/Spartan-IIE Family OTP Configuration PROMs XC17S00A R DS078 (v1.10) June 25, 2007 Product Specification 5 Features • Configuration one-time programmable (OTP) read-only memory designed to store configuration bitstreams for Spartan -II/Spartan-IIE FPGA devices


    Original     		PDF XC17S00A) DS078 20-year 20-pin 44-pin XC17S150APD8C XC17S15AVO8C XC17S50APDG8C XC17S150AVO8C XC17S15AVOG8C XC17S200APD8C XC17S00A XC2S100 XC2S100E XC2S15 XC2S150 XC2S200 XC2S30 XC2S50 XC2S50E

    PC44

    Abstract: SO20 VQ44 XC17V00 XC18V00 XC2VP20 XC2VP30 XC2VP40
    Text: XC18V00 Series In-System Programmable Configuration PROMs R DS026 v5.0 April 5, 2004 Features • Product Specification • Dual configuration modes - Serial Slow/Fast configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) In-system programmable 3.3V PROMs for


    Original     		PDF XC18V00 DS026 XC18V04 XC18V02, XC18V01 XC18V512, PC44 SO20 VQ44 XC17V00 XC2VP20 XC2VP30 XC2VP40

    schematic diagram atx Power supply 500w

    Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
    Text: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455


    Original     		PDF P462-ND P463-ND LNG295LFCP2U LNG395MFTP5U US2011) schematic diagram atx Power supply 500w pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS

    XCF04S

    Abstract: xcf16pfs XCF32P-VOG48 XCF02S RELIABILITY REPORT 48-pin TSOP Package VO48 Xilinx Spartan-II 2.5V FPGA Family FSG48 XCF02S pcb
    Text: 47 Platform Flash In-System Programmable Configuration PROMs R DS123 v2.13.1 April 3, 2008 Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • ♦ 3.3V Supply Voltage Low-Power Advanced CMOS NOR Flash Process


    Original     		PDF DS123 XCF04S xcf16pfs XCF32P-VOG48 XCF02S RELIABILITY REPORT 48-pin TSOP Package VO48 Xilinx Spartan-II 2.5V FPGA Family FSG48 XCF02S pcb

    xcf16pfs

    Abstract: Xilinx XCF04S XCF01S XC2V80 DS026
    Text: Platform Flash In-System Programmable Configuration PROMs R DS123 v2.3 May 7, 2004 Preliminary Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • Low-Power Advanced CMOS FLASH Process • Endurance of 20,000 Program/Erase Cycles


    Original     		PDF DS123 xcf16pfs Xilinx XCF04S XCF01S XC2V80 DS026

    XC3S250E design guide

    Abstract: csb 485 E2
    Text: <BL Blue> R DS123 v2.11 February 1, 2007 Platform Flash In-System Programmable Configuration PROMs Product Specification Features • • In-System Programmable PROMs for Configuration of Xilinx FPGAs ♦ • 3.3V supply voltage Low-Power Advanced CMOS NOR FLASH Process


    Original     		PDF DS123 LVCMOS25 XC3S250E design guide csb 485 E2

    xc18v02 Date Marking

    Abstract: XC18V04 XC18V02 XC18V128 XC18V04VQ44C xilinx SO20 MARKING CODE XC18V01VQ44C XC18V01pc20c marking XC18V01SO20C XC18V00
    Text: XC18V00 Series In-System Programmable Configuration PROMs R DS026 v3.10 April 17, 2003 Features • Product Specification • Dual configuration modes - Serial Slow/Fast configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) In-system programmable 3.3V PROMs for


    Original     		PDF XC18V00 DS026 XC2S400E XC2S600E xc18v02 Date Marking XC18V04 XC18V02 XC18V128 XC18V04VQ44C xilinx SO20 MARKING CODE XC18V01VQ44C XC18V01pc20c marking XC18V01SO20C

    sil164

    Abstract: sil-164 33rx4 u c739 SiI164CT64 D2461 sil 164 L300 SWITCH transistor C734 002BS
    Text: 5 4 3 2 1 Power & Config D FPGA_CFG EXT_RESET# D FPGA_CFG CONFIG[9.0] EXT_RESET# RESET#[1.0] Reference ID: 100 CONFIG[9.0] RESET#[1.0] RESET#1 #2 Lime Evaluation Board Revision: PA8 RESET#1 C EXT_RESET# RESET#[1.0] FPGA_CFG CONFIG[9.0] RESET#1 Video


    Original     		PDF SDA11 SDA10 A10/AP K4S561632x-xCxx D-24613 sil164 sil-164 33rx4 u c739 SiI164CT64 D2461 sil 164 L300 SWITCH transistor C734 002BS

    XC2S400E

    Abstract: XC2S200E XC2S100E XC2S150E XC2S300E XC2S50E XC2S400-E XC2s600e XC2S600-E bga pin 676
    Text: Spartan-IIE 1.8V FPGA Family: Introduction and Ordering Information R DS077-1 v2.1 July 9, 2003 Introduction Product Specification • The Spartan -IIE 1.8V Field-Programmable Gate Array family gives users high performance, abundant logic resources, and a rich feature set, all at an exceptionally low


    Original     		PDF DS077-1 DS077-2, DS077-3, DS077-4, XC2S400E XC2S600E. XC2S150E XC2S50E XC2S200E XC2S100E XC2S300E XC2S50E XC2S400-E XC2s600e XC2S600-E bga pin 676

    XC2S400

    Abstract: XC2S50E LP1-D12 XC2S100E XC2S150E L198N L66N DS-00121 2P101 L130N
    Text: Spartan-IIE 1.8V FPGA Family: Complete Data Sheet R DS077 July 9, 2003 Product Specification This document includes all four modules of the Spartan -IIE FPGA data sheet. Module 1: Introduction and Ordering Information Module 3: DC and Switching Characteristics


    Original     		PDF DS077 DS077-1 DS077-3 DS077-2 XC2S50E DS077-1, DS077-2, DS077-3, DS077-4, DS077-4 XC2S400 LP1-D12 XC2S100E XC2S150E L198N L66N DS-00121 2P101 L130N

    B1133

    Abstract: No abstract text available
    Text: Spartan-IIE 1.8V FPGA Family: Introduction and Ordering Information R DS077-1 v1.1 June 27, 2002 Introduction Preliminary Product Specification • The Spartan -IIE 1.8V Field-Programmable Gate Array family gives users high performance, abundant logic


    Original     		PDF DS077-1 XC2S50 DS001-1, DS001-2, DS001-3, DS001-4, DS001-4 B1133