Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    VIRTEX-II PRO Search Results

    VIRTEX-II PRO Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    10108877-R10253SLF Amphenol Communications Solutions PWR LowProfile® PRO,RAH,25S+10P Visit Amphenol Communications Solutions
    10108877-R08203SLF Amphenol Communications Solutions PWR LowProfile® PRO,RAH,20S+8P Visit Amphenol Communications Solutions
    10108888-R10253SLF Amphenol Communications Solutions PWR LowProfile® PRO,RAR,25S+10P Visit Amphenol Communications Solutions
    10108877-R10253HLF Amphenol Communications Solutions 10108877-R10253HLF-PWR LO PRO,RAH,25S+10P Visit Amphenol Communications Solutions
    10122460-011LF Amphenol Communications Solutions 10122460-011LF-PWR LO PRO,RAH,25S+2P Visit Amphenol Communications Solutions

    VIRTEX-II PRO Datasheets (11)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    Virtex-II Pro Xilinx Virtex-II Pro x Platform FPGAs: DC and Switching Characteristics Original PDF
    Virtex-II Pro Xilinx Virtex-II Pro and Virtex-II Pro x Platform FPGAs: Complete Data Sheet Original PDF
    Virtex-II Pro Xilinx Virtex-II Pro Platform FPGAs: Pinout Information Original PDF
    Virtex-II Pro Xilinx Pro Field Programmable Gate Array Original PDF
    Virtex-II Pro Xilinx Virtex-II Pro Platform FPGAs: Introduction and Overview Original PDF
    Virtex-II Pro Xilinx Virtex-II Pro x Platform FPGAs: Functional Description Original PDF
    Virtex-II Pro Xilinx Virtex-II Pro x Platform FPGAs: Introduction and Overview Original PDF
    Virtex-II Pro Xilinx Virtex-II Pro Platform FPGAs: Functional Description Original PDF
    Virtex-II Pro Xilinx Virtex-II Pro Platform FPGAs: DCand Switching Characteristics Original PDF
    Virtex-II Pro Xilinx Virtex-II Pro x Platform FPGAs: Complete Data Sheet Original PDF
    Virtex-II Pro Xilinx Virtex-II Pro x Platform FPGAs: Pinout Information Original PDF

    VIRTEX-II PRO Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    IDTQS3861PA

    Abstract: virtex 2 pro QS3861 Virtex-4 datasheet XAPP646 1N4004 IDTQS3861Q IDTQS3861SO QS3R861 XAPP653
    Text: Application Note: Virtex-II, Virtex-II Pro, Virtex-4, Virtex-5, Spartan-3, and Spartan-3E Families Connecting Devices in the Virtex and Spartan Families to a 3.3V or 5V PCI Bus R XAPP646 v1.2.2 April 23, 2007 Summary This application note describes how to connect Virtex -II, Virtex-II Pro, Virtex-4, Virtex-5,


    Original     		XAPP646 IDTQS3861PA virtex 2 pro QS3861 Virtex-4 datasheet XAPP646 1N4004 IDTQS3861Q IDTQS3861SO QS3R861 XAPP653 PDF

    3S400

    Abstract: 3S200 visionprobe 2V250 V600 3S50 3S400 ibis DIAB ISE BASEX MXE
    Text: Devices Design Entry Embedded System Design Synthesis Feature ISE WebPACK ISE BaseX ISE Foundation ISE Alliance Virtex Series Virtex-E: V50E -V300E Virtex-II: 2V40 - 2V250 Virtex-II Pro: 2VP2 Virtex: V50 - V600 Virtex-E: V50E - V600E Virtex-II: 2V40 - 2V500


    Original     		-V300E 2V250 V600E 2V500 XC2S400E XC2S600E) 3S200, 3S400 3S400 3S200 visionprobe 2V250 V600 3S50 3S400 ibis DIAB ISE BASEX MXE PDF

    XAPP623

    Abstract: LVCMOS25 PCI33 UG112 XAPP646 XAPP653 XAPP659
    Text: Application Note: Virtex-II Pro / Virtex-II Pro X Family R Virtex-II Pro / Virtex-II Pro X 3.3V I/O Design Guidelines XAPP659 v1.7 April 24, 2007 Summary This application note describes guidelines on interfacing 3.3V I/O standards (PCI, LVTTL, and LVCMOS) in a Virtex -II Pro / Virtex-II Pro X system design. Topics include


    Original     		XAPP659 XAPP653 XAPP646, XAPP623 LVCMOS25 PCI33 UG112 XAPP646 XAPP659 PDF

    Untitled

    Abstract: No abstract text available
    Text: Dual-Port Block Memory v5.0 DS235 v0.1 November 1, 2002 Product Specification Features • Drop-in module for Virtex , Virtex-E, Virtex-II, Virtex-II Pro™, Spartan™-II, Spartan-IIE, and Spartan-3 FPGAs • Supports all three Virtex-II write mode options:


    Original     		DS235 xcv50E xcv100E xcv200E xcv300R xcv400E xcv600E xcv1000E xcv1600E xcv2000E PDF

    256x16* STATIC RAM

    Abstract: 32Kx1 false RAMB16 XC2S100 XC2S15 XC2S150 XC2S200 XC2S30 XC2S50
    Text: Single-Port Block Memory Core v6.2 DS234 April 28, 2005 Features • Fully synchronous drop-in module for Virtex , Virtex-II, Virtex-II Pro, Virtex-4, Spartan™-II, Spartan-IIE, Spartan-3, and Spartan-3E FPGAs • Supports all three Virtex-II write mode options:


    Original     		DS234 256x16* STATIC RAM 32Kx1 false RAMB16 XC2S100 XC2S15 XC2S150 XC2S200 XC2S30 XC2S50 PDF

    XAPP228

    Abstract: vhdl code for DCM x228
    Text: Application Note: Virtex, Spartan-II, Spartan-IIE, Virtex-E, Virtex-II, Virtex-II Pro Families R Quad-Port Memories in Virtex Devices Author: Nick Sawyer and Marc Defossez XAPP228 v1.0 September 24, 2002 Summary This application note describes how the existing dual-port block memories in the Spartan -II


    Original     		XAPP228 XAPP228 vhdl code for DCM x228 PDF

    IN4001 diode

    Abstract: 1N4001/DIODE 1N4001 IN4001 diode INFORMATION Virtex 5 for Network Card 1N4001 IN4001 XAPP251 XC4000XL "Common rail"
    Text: Application Note: Virtex-II, Virtex-II Pro, Virtex-4, and Virtex-5 Families R XAPP251 v1.3.1 May 14, 2007 Hot-Swapping Virtex-II, Virtex-II Pro, Virtex-4, and Virtex-5 Devices Author: Austin Lesea and Peter Alfke Summary Hot-swapping or hot insertion describes a potentially dangerous method of inserting an unpowered board into a powered-on (hot) running system. There are several concerns: the


    Original     		XAPP251 IN4001 diode 1N4001/DIODE 1N4001 IN4001 diode INFORMATION Virtex 5 for Network Card 1N4001 IN4001 XAPP251 XC4000XL "Common rail" PDF

    Virtex-II

    Abstract: No abstract text available
    Text: R DataSource CD-ROM Q2-01 Virtex Products — More Technical Information Virtex-II Pinouts for Packages Text Files see “pinout_text_files” on root directory of DataSource CD Virtex-II Platform FPGA User Guide Virtex-II IBIS Files (zip format) Virtex-II IBIS files (tar format)


    Original     		Q2-01 Virtex-II PDF

    IDTQS3861Q

    Abstract: 1N4004 IDTQS3861PA IDTQS3861SO QS3861 QS3R861 XAPP646
    Text: Application Note: Virtex-II and Virtex-II Pro Families Connecting Virtex-II Devices to a 3.3V/5V PCI Bus R XAPP646 v1.2 August 8, 2002 Summary This application note describes how to connect Virtex -II and Virtex-II Pro™ devices to 3.3V or 5V PCI buses. The design responds to customer demand for a general solution for


    Original     		XAPP646 IDTQS3861PA Switches-QS3861 IDTQS3861Q 1N4004 IDTQS3861PA IDTQS3861SO QS3861 QS3R861 XAPP646 PDF

    4kx4 rom

    Abstract: AZ 280 memory
    Text: Dual-Port Block Memory v6.1 DS235 May 21, 2004 Features Product Specification Figure Top x-ref 1 • Drop-in module for Virtex , Virtex-E, Virtex-II™, Virtex-II Pro™, Virtex-4™, Spartan-II™, Spartan-IIE, and Spartan-3™ FPGAs • Supports all three Virtex-II write mode options:


    Original     		DS235 4kx4 rom AZ 280 memory PDF

    accumulator xilinx v7.0

    Abstract: false DS213 low power and area efficient carry select adder
    Text: Accumulator v7.0 DS213 April 28, 2005 Product Specification Features • Drop-in module for Virtex , Virtex-E, Virtex-II, Virtex-II Pro, Virtex-4, Spartan™-II, Spartan-IIE, Spartan-3, and Spartan-3E FPGAs • Generates Add, Subtract, and Add/Subtract-based


    Original     		DS213 accumulator xilinx v7.0 false low power and area efficient carry select adder PDF

    K2974

    Abstract: K2370 EXCESS 3 code generator and decoder
    Text: 8b/10b Decoder v7.1 DS258 April 28, 2005 Product Specification Features • Optional SYM_DISP output provides disparity information on the current symbol being decoded • Drop-in module for Virtex , Virtex-E, Virtex-II, Virtex-II Pro, Virtex-4, Spartan™-II, Spartan-IIE,


    Original     		8b/10b DS258 10-bit K2974 K2370 EXCESS 3 code generator and decoder PDF

    false

    Abstract: DS214 low power and area efficient carry select adder adder xilinx
    Text: Adder/Subtracter v7.0 DS214 April 28, 2005 Product Specification Features • Drop-in module for Virtex , Virtex-E, Virtex-II, Virtex-II Pro, Virtex-4, Spartan™-II, Spartan-IIE, Spartan-3, and Spartan-3E FPGAs • Generates Adder, Subtracter and Adder/Subtracter


    Original     		DS214 false low power and area efficient carry select adder adder xilinx PDF

    256x16* STATIC RAM

    Abstract: AZ 280 memory 4Kx4 rom DS234
    Text: Single-Port Block Memory v5.0 DS234 v0.1 November 1, 2002 Product Specification Features • Fully synchronous drop-in module for Virtex , Virtex-II, Virtex-II Pro™, Spartan™-II, Spartan-IIE, and Spartan-3 FPGAs • Supports all three Virtex-II write mode options:


    Original     		DS234 xcv800 xcv1000 xcv50E xcv100E xcv200E xcv300R xcv400E xcv600E xcv1000E 256x16* STATIC RAM AZ 280 memory 4Kx4 rom DS234 PDF

    K2371

    Abstract: XIP2036 BD102 8b/10b encoder XIP2035 XIP2037 DS254 K2801 manchester encoder xilinx
    Text: 8b/10b Encoder v5.0 DS254 May 21, 2004 Product Specification Features • Drop-in module for Virtex , Virtex-E, Virtex-II,™ Virtex-II Pro™, Virtex-4™, Spartan™-II, Spartan-IIE, and Spartan-3 FPGAs • Optional CE input to enable or stall the Encoder


    Original     		8b/10b DS254 10-bit K2371 XIP2036 BD102 8b/10b encoder XIP2035 XIP2037 K2801 manchester encoder xilinx PDF

    RAMB16

    Abstract: 16Kx1 XC2S100 XC2S15 XC2S150 XC2S200 XC2S30 XC2S50 XCV50 DS235
    Text: Dual-Port Block Memory Core v6.3 DS235 August 31, 2005 Features Product Specification Figure Top x-ref 1 • Drop-in module for Virtex , Virtex-E, Virtex-II, Virtex-II Pro, Virtex-4, Spartan™-II, Spartan-IIE, Spartan-3, and Spartan-3E FPGAs ADDRA[n:0]


    Original     		DS235 RAMB16 16Kx1 XC2S100 XC2S15 XC2S150 XC2S200 XC2S30 XC2S50 XCV50 PDF

    cordic design for fixed angle rotation

    Abstract: CORDIC in xilinx CORDIC system generator xilinx CORDIC MAGNITUDE code for scale free cordic cordic design for fixed angle of rotation code for cordic cordic algorithm CORDIC tanh fpga polar architecture
    Text: CORDIC v2.0 DS249 v1.5 March 28, 2003 Product Specification Features • Word Serial architectural configuration for small area • Available for all Virtex , Virtex-E, Virtex-II, Virtex-II Pro™, Spartan™-II, Spartan-IIE and Spartan-3 FPGA family members


    Original     		DS249 cordic design for fixed angle rotation CORDIC in xilinx CORDIC system generator xilinx CORDIC MAGNITUDE code for scale free cordic cordic design for fixed angle of rotation code for cordic cordic algorithm CORDIC tanh fpga polar architecture PDF

    x9214

    Abstract: DS252
    Text: Reed-Solomon Decoder v4.0 DS252 v1.0 March 28, 2003 Product Specification Features • High-speed, compact Reed-Solomon Decoder • Available for all Virtex , Virtex-E, Virtex-II, Virtex-II Pro™, Spartan™-II, Spartan-IIE and Spartan-III FPGA family members


    Original     		DS252 x9214 DS252 PDF

    vhdl code for msk modulation

    Abstract: vhdl code to generate sine wave vhdl code dds XILINX vhdl code NCO DS246 equivalent verilog code for sine wave using FPGA DS246 verilog for 8 point fft using FPGA spartan3 verilog code to generate sine wave XIP166
    Text: DDS v5.0 DS246 April 28, 2005 Product Specification Features • • • • • • • • • • • • • Drop-in module for Virtex , Virtex-E, Virtex-II, Virtex-II Pro, Virtex-4, Spartan™-II, Spartan-IIE, Spartan-3, and Spartan-3E FPGAs Sine, Cosine, or quadrature outputs


    Original     		DS246 vhdl code for msk modulation vhdl code to generate sine wave vhdl code dds XILINX vhdl code NCO DS246 equivalent verilog code for sine wave using FPGA verilog for 8 point fft using FPGA spartan3 verilog code to generate sine wave XIP166 PDF

    verilog code for fir filter using DA

    Abstract: 4 tap fir filter based on mac vhdl code polyphase interpolator design in verilog verilog code for interpolation filter verilog code for decimation filter image video procesing code VHDL code for polyphase decimation filter VHDL code for polyphase decimation filter using D verilog code for decimator fir compiler xilinx
    Text: Distributed Arithmetic FIR Filter v8.0 DS240 v1.0 March 28, 2003 Features General Description • Drop-in module for Virtex , Virtex-E, Virtex-II, Virtex-II Pro™, Spartan™-II, Spartan-IIE, and Spartan-3 FPGAs • High-performance finite impulse response (FIR),


    Original     		DS240 32-bit verilog code for fir filter using DA 4 tap fir filter based on mac vhdl code polyphase interpolator design in verilog verilog code for interpolation filter verilog code for decimation filter image video procesing code VHDL code for polyphase decimation filter VHDL code for polyphase decimation filter using D verilog code for decimator fir compiler xilinx PDF

    SRLC16E

    Abstract: SRLC16 Shift Registers register based fifo xilinx XAPP256 SRL16 synchronous fifo design in verilog vhdl code for fifo FIFO128 FIFO256
    Text: Application Note: Virtex-II Series R FIFOs Using Virtex-II Shift Registers Author: Lakshmi Gopalakrishnan XAPP256 v1.3 January 5, 2005 Summary The shift registers available in Virtex-II series devices, including Virtex-II Pro™ devices, are ideal when building synchronous FIFOs. By using the flexibility of the shift register LUT


    Original     		XAPP256 SRL16) SRL16 SRLC16) FIFO128 128-bit FIFO256 256-bit SRLC16E SRLC16 Shift Registers register based fifo xilinx XAPP256 synchronous fifo design in verilog vhdl code for fifo PDF

    SRL16-based

    Abstract: DS230 16x32 character
    Text: Distributed Memory v6.0 DS230 v0.1 November 1, 2002 Product Specification Features Functional Description • Drop-in module for Virtex , Virtex-E, Virtex-II, Virtex-II Pro™, Spartan™-II, Spartan-IIE, and Spartan-3 FPGAs • Generates ROMs, single/dual-port RAMs, and


    Original     		DS230 SRL16-based DS230 16x32 character PDF

    Sibercore

    Abstract: CLK180 XAPP254 Sibercore Technologies longest prefix match CAM
    Text: Application Note: Virtex-II Family R Virtex-II SiberBridge Author: Ratima Kataria & the SiberCore Applications Engineering Group XAPP254 v1.1 February 25, 2005 Summary Designed to be implemented in a Virtex -II FPGA, the Virtex-II SiberBridge is a register


    Original     		XAPP254 32-bit Sibercore CLK180 XAPP254 Sibercore Technologies longest prefix match CAM PDF

    Sibercore

    Abstract: XAPP254 Sibercore Technologies ternary content addressable memory CLK180 SiberCAM longest prefix match CAM
    Text: Application Note: Virtex-II Family R The Virtex-II SiberBridge Author: Ratima Kataria & the SiberCore Applications Engineering Group XAPP254 v1.0 January 12, 2001 Summary Designed to be implemented in a Virtex -II FPGA, the Virtex-II SiberBridge is a register


    Original     		XAPP254 32-bit Sibercore XAPP254 Sibercore Technologies ternary content addressable memory CLK180 SiberCAM longest prefix match CAM PDF