TG550
Abstract: Frequency Generator 1MHz digital variable attenuator 60dB 5hz frequency GENERATOR sweep generator EN50081-1 EN50082-1
Text: CYAN MAGENTA YELLOW BLACK Technical Specifications FREQUENCY Frequency Range: Vernier Range: OPERATING MODES 0.005Hz to 5MHz in 7 overlapping decade ranges with fine adjustment by verniers. 1000:1 on each range. FREQUENCY LOCKING Operating Range: Locking Accuracy:
|
Original
|
PDF
|
005Hz
001Hz.
EN601010-1
EN50081-1
EN50082-1
TG550
Frequency Generator 1MHz
digital variable attenuator 60dB
5hz frequency GENERATOR
sweep generator
EN50081-1
EN50082-1
|
54620-61601
Abstract: 54620 1251-8106 10079A 34810A eft 317 transistor 54620C 54651A Digital storage oscilloscope Remote Digital Display
Text: H Page 1 of 4, Document #4110 HP 54620A/C Logic Analyzers Product Overview • • • • • 16 Channels 500 MSa/s 3.5 ns Glitch Capture Simple Scope-Like Operation Full Color Display With 54620C Do you use your scope as your primary tool for troubleshooting
|
Original
|
PDF
|
4620A/C
54620C
4650A
4651A
RS-232
4652A
0070A
0071A
0072A
1007X
54620-61601
54620
1251-8106
10079A
34810A
eft 317 transistor
54620C
54651A
Digital storage oscilloscope
Remote Digital Display
|
sldram
Abstract: SLD4M18DR400 CONS400
Text: DRAFT/ADVANCE SLDRAM CONSORTIUM HYB25SL64180V-400 4 MEG x 18 SLDRAM 4M x 18 SLDRAM 400 Mb/s/pin SLDRAM PIPELINED, EIGHT BANK, 2.5V OPERATION FEATURES • Very High Speed - 400 MHz data rate • 800 MB/s peak I/O Bandwidth - provides very high bandwidth over narrow system memory bus
|
Original
|
PDF
|
HYB25SL64180V-400
CONS400
sldram
SLD4M18DR400
|
SLD4M18DR400
Abstract: sldram dcov MOSAID Technologies general semiconductor marking code GF
Text: MOSAID Technologies Incorporated Semiconductor Division SLD4M18DR400 4 MEG x 18 SLDRAM FEATURES • • • • • • • • • • • • • • • • • Very High Speed – 400 MHz data rate 800 Mb/s peak I/O Bandwidth-provides very high bandwidth over narrow system memory bus
|
Original
|
PDF
|
SLD4M18DR400
SLD4M18DR400
sldram
dcov
MOSAID Technologies
general semiconductor marking code GF
|
CPC945
Abstract: verniers CPC945 Memory Signal Delay Tuning
Text: Title Page CPC945 Bridge and Memory Controller Application Note - Memory Signal Delay Tuning Document Revision Level 1.3 August 29, 2007 Copyright and Disclaimer Copyright International Business Machines Corporation 2007 All Rights Reserved Printed in the United States of America August 2007
|
Original
|
PDF
|
CPC945
0x200"
verniers
CPC945 Memory Signal Delay Tuning
|
SAMSUNG 5CA
Abstract: sldram SLD4M18DR400 HYB25SL7218V 357-100 com ca9 Cross Jumper 8mm Pitch LG 7CA SLD4M18DR400VS400 NEC C 324 C
Text: DRAFT/ADVANCE SLDRAM Inc. HYB25SL7218V 4 MEG x 18 SLDRAM 4M x 18 SLDRAM 400 Mb/s/pin SLDRAM PIPELINED, EIGHT BANK, 2.5V OPERATION FEATURES • Very High Speed - 400 MHz data rate • 800 MB/s peak I/O Bandwidth - provides very high bandwidth over narrow system memory bus
|
Original
|
PDF
|
HYB25SL7218V
CORP400
SAMSUNG 5CA
sldram
SLD4M18DR400
HYB25SL7218V
357-100
com ca9
Cross Jumper 8mm Pitch
LG 7CA
SLD4M18DR400VS400
NEC C 324 C
|
Untitled
Abstract: No abstract text available
Text: >4MCC Q20000 "T U R B O ECL/TTL TIMING VERNIERS TIMING VERNIER PD01S Figure 16. Functional Block Diagram The PD01S is a programmable delay macro in the Q20000 TU R B O ” family that provides a timing genera tion or deskew function for precision timing applications
|
OCR Scan
|
PDF
|
Q20000
PD01S
PD01S
Q20000
|
Untitled
Abstract: No abstract text available
Text: JkMCC M IC RO POW ER ST A N D A R D C E L L 3.3V / 5V TIMING VERNIERS Timing Vernier cells with outstanding performance characteristics are available for the Micropower fam ily. These parametrics have been achieved by com bining AM C C 's te ch n ica l expertise w ith a
|
OCR Scan
|
PDF
|
64-bit
8B/10B
10B/8B
Q20000
|
LT 5219
Abstract: No abstract text available
Text: BROOKTREE CORP Id ÏË imSSIS D0D132B 1 J " ° _ 7 = Preliminary Information This document contains information on a new product. Parametric information, although not fully characterized, is the result of testing initial devices. S '/ 'f f Bt602 20 ps Resolution
|
OCR Scan
|
PDF
|
D0D132B
Bt602
28-pin
T-51-19
LT 5219
|
Q20P010
Abstract: Q20M100 carry look ahead adder Q20080 Q20P025 Q20025 vernier Q20000 Q20004 Q20010
Text: D EV IC E SP EC IFIC A TIO N LOGIC ARRAYS Q20000 “TURBO” ECL/TTL Q20000 FEATURES Figure 6. Q20080 Die • • • • • • • • • • Up to 18,777 gates, channelless architecture 100 ps equivalent gate delays Low power 0.5-1.0 mW/gate 10K, 10KH, 10OK ECL and mixed ECL/TTL capability
|
OCR Scan
|
PDF
|
Q20000
Q20000
0Q03RL
Q20P010
Q20M100
carry look ahead adder
Q20080
Q20P025
Q20025
vernier
Q20004
Q20010
|
Untitled
Abstract: No abstract text available
Text: VITESSE SEMiCONRUOTOR CORPORATION Advance Product Information High-Speed Octal Programmable Timing Generator VSC6048 Features • Eight Fully-Integrated Timing Generators for ATE Applications • 10/5 ns Delay Range, 10 ps Resolution • Fully Digital Interface. No Off-chip DACs or
|
OCR Scan
|
PDF
|
VSC6048
VSC6048
G52165-0,
|
marking code Ss
Abstract: SLD4M18DR400 9742t 9712T siemens tid
Text: DRAFT/ADV ANCE SLDRAM CONSORTIUM SLD4M18DR400 4 MEG x 18 SLDRAM 4M x 18SLDRAM 400 Mb/s/pin SLDRAM PIPELINED, EIGHT BANK, 2.5V OPERATION FEATURES • V ery H igh Speed - 400 M H z data rate • 800 M B /s peak 1 /O Bandw idth - provides very high bandw idth over narrow system m em ory bus
|
OCR Scan
|
PDF
|
SLD4M18DR400
marking code Ss
9742t
9712T
siemens tid
|
Untitled
Abstract: No abstract text available
Text: Advance Product Information 1Gb/s 16.channel VSC6250 Drive-Side Deskew 1C Applications High-Speed Instrumentation: Pulse Generators, Timing Margin Testers for Datalink, Interface, and Disk Drive Applications • Drive-Side Deskew in High-Speed Memory Testers with Excellent Timing Accuracy
|
OCR Scan
|
PDF
|
VSC6250
500ps
750ps
G52197-0,
|
AD9505KP
Abstract: No abstract text available
Text: ANALOG DEVICES FEATURES 60 MHz Update Rate ±1.5 LSB Dynamic Nonlinearity 100 MHz Update Rate ±5 LSB Dynamic Nonlinearity On-the-Fly Delay Update 8-Bit Resolution 2.5 ns to 25 ns Full-Scale Range 10 ps Incremental Delay On-Board Calibration DAC Digitally Programmable
|
OCR Scan
|
PDF
|
AD9505
AD9505
28-Lead
AD9505KP
|
|
|
Untitled
Abstract: No abstract text available
Text: Bt602 Preliminary Information This document contains information on a new product. Parametric information, although not fully characterized, is the result of testing initial devices. 20 ps Resolution 10KH ECL Compatible Programmable Timing Edge Vernier D istingu ish ing Features
|
OCR Scan
|
PDF
|
Bt602
28-pin
Bt602
|
Untitled
Abstract: No abstract text available
Text: Panel Potentiometers SELECTOR GUIDE: S e rie s D escrip tio n T yp e J RV4 (2RV7) EJ Standard o f the industry for quality. H ot-m o ld ed com position; single, dual, triple sections available. Switch for single o r dual sections. Backlash vernier available. (A lso see Attenuator section.)
|
OCR Scan
|
PDF
|
|
Untitled
Abstract: No abstract text available
Text: Adjustable Attenuators SELECTOR GUIDE T yp e H igh-perform ance hot-m olded com position p anel control. Sw itch for dual sections available. J MOD POT Series 70,72 & 73 M* 2000 BT D e scrip tio n in T T If H ot-m olded com position with m odular design offers alm ost
|
OCR Scan
|
PDF
|
|
Untitled
Abstract: No abstract text available
Text: Bt605 Preliminary Information This document contains information on a new product. The parametric in formation, although not fully characterized, is the result o f testing initial devices. Distinguishing Features • 125 M Hz Maximum Trigger Rate • Less than ±1 LSB Timing
|
OCR Scan
|
PDF
|
Bt605
28-pin
Bt605
60MHz)
125MHz)
Bt605KPJ
|
BT605KPJ
Abstract: No abstract text available
Text: Preliminary Information This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices. Distinguishing Features 125 MHz Maximum Trigger Rate Less than ±1 LSB Timing Accuracy
|
OCR Scan
|
PDF
|
28-pin
Bt605
Bt605
Bt605KPJ
BT605KPJ
|
Untitled
Abstract: No abstract text available
Text: BROOKTREE CORP Ifl DE I IbMSSTS GO 013 2□ 7 | 20 D ~ 7 ^ S r / - / ‘7 Preliminary Information T his docum ent contains inform ation on a new product. Parametric inform ation, although not fully characterized, is the result o f testing initial devices.
|
OCR Scan
|
PDF
|
Bt601
28-pin
Bt601
|
Untitled
Abstract: No abstract text available
Text: Bt602 Preliminary Information This document contains information on a new product. Parametric information, although not fully characterized, is the result of testing initial devices. 20 ps Resolution 10KH ECL Compatible Programmable Timing Edge Vernier D istingu ishing F eatures
|
OCR Scan
|
PDF
|
Bt602
28-pin
Bt602
|
HLP5
Abstract: full adder using x-OR and NAND gate OAI221 OA41 G5108
Text: VITESSE SEMICONDUCTOR CORPORATION Data Sheet High Performance SCFUDCFL Gate Arrays SCFX Family Features • Tailored Specifically for High Performance Telecommunications and Data Communica tions Applications. 2.5 GHz Performance. Phase-Locked Loop Megacells Available:
|
OCR Scan
|
PDF
|
STS-3/STS-12
G51085-0,
00030flfl
HLP5
full adder using x-OR and NAND gate
OAI221
OA41
G5108
|
Untitled
Abstract: No abstract text available
Text: Advance Product Information High-Speed Octal Programmable Timing Generator VSC6048 Features • Eight Fully-Integrated Timing Generators for ATE Applications • 10/5 ns Delay Range, 10 ps Resolution • Fully Digital Interface. No Off-chip DACs or Trim Components Required.
|
OCR Scan
|
PDF
|
VSC6048
VSC6048
G52165-0
G52165-0,
|
mod pot 70 series
Abstract: dual concentric pot mod pot
Text: Adjustable Attenuators SELECTOR GUIDE Type High-performance hot-molded composition panel control. Switch for dual sections available. J MOD POT Series 70,72 & 73 2000 Description ìé BT Hot-molded composition with modular design offers almost unlimited combinations; dual,
|
OCR Scan
|
PDF
|
|