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    V961PBC Price and Stock

    Rochester Electronics LLC V961PBC-33LP

    BUS CONTROLLER, PQFP160
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey V961PBC-33LP Bulk 6
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    Rochester Electronics LLC V961PBC-40LP

    BUS CONTROLLER, PQFP160
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey V961PBC-40LP Bulk 6
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    V3SEMI V961PBC-33LP

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components V961PBC-33LP 48
    • 1 $74.976
    • 10 $74.976
    • 100 $59.9808
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    QuickLogic Corporation V961PBC-33LP

    PCI Bus to Local Bus Bridge, PQFP160
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Rochester Electronics V961PBC-33LP 5,862 1
    • 1 $52.5
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    • 100 $49.35
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    QuickLogic Corporation V961PBC-40LP

    PCI Bus to Local Bus Bridge, PQFP160
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Rochester Electronics V961PBC-40LP 2,247 1
    • 1 $53.47
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    • 100 $50.26
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    V961PBC Datasheets (14)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    V961PBC QuickLogic Interface: Local Bus to PCI Bridge Original PDF
    V961PBC-33 QuickLogic LOCAL BUS TO PCI BRIDGE CONTROLLERS Original PDF
    V961PBC-33LPN QuickLogic Local Bus To Pci Bridge Original PDF
    V961PBC-33LPN REV B2 QuickLogic processor: LOCAL BUS TO PCI BRIDGE For MULTIPLEXED A/D PROCESSORS Original PDF
    V961PBC-33LP REV B2 QuickLogic processor: LOCAL BUS TO PCI BRIDGE For MULTIPLEXED A/D PROCESSORS Original PDF
    V961PBC-33 REV B2 QuickLogic LOCAL BUS TO PCI BRIDGE CONTROLLERS Original PDF
    V961PBC-33REVB2 QuickLogic Local bus to PCI bridge for multiplexed A/D processors. Frequency 33 MHz. Original PDF
    V961PBC-33REVB2 QuickLogic LOCAL BUS TO PCI BRIDGE CONTROLLER Original PDF
    V961PBC-40 QuickLogic LOCAL BUS TO PCI BRIDGE CONTROLLERS Original PDF
    V961PBC-40LP QuickLogic Local Bus To Pci Bridge Original PDF
    V961PBC-40LPREVB2 QuickLogic processor: LOCAL BUS TO PCI BRIDGE For MULTIPLEXED A/D PROCESSORS Original PDF
    V961PBC-40 REV B2 QuickLogic LOCAL BUS TO PCI BRIDGE CONTROLLERS Original PDF
    V961PBC-40REVB2 QuickLogic LOCAL BUS TO PCI BRIDGE CONTROLLER Original PDF
    V961PBC-40REVB2 QuickLogic Local bus to PCI bridge for multiplexed A/D processors. Frequency 40 MHz. Original PDF

    V961PBC Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Signal Path Designer

    Abstract: No abstract text available
    Text: V96BMC Rev D HIGH PERFORMANCE BURST DRAM CONTROLLER FOR i960 Cx/Hx/Jx and PowerPC 401Gx PROCESSORS BLOCK DIAGRAM • Direct interface to i960Cx/Hx/Jx processors • 2Kbyte burst transaction support • SRAM performance achieved with DRAM • Designed to work with V961PBC and


    Original     		V96BMC PowerPCTM401Gx i960Cx/Hx/Jx 512Mbytes V961PBC V962PBC 24-bit 40MHz 132-pin V96BMC, Signal Path Designer PDF

    Untitled

    Abstract: No abstract text available
    Text: V961PBC Rev. B2 LOCAL BUS TO PCI BRIDGE FOR MUTLTELEXED A/D PROCESSORS • Dual bi-directional address space remapping • Glueless interface between Intel i960Jx, IBM PPC401Gx, processors and PCI bus • On-the-fly byte order endian conversion • Fully compliant with PCI 2.1 specification


    Original     		V961PBC i960Jx, PPC401Gx, 8/16-bit i960Jx PPC401Gx 16MHz 40MHz PDF

    AD14

    Abstract: AD30 PPC401GF V292PBC V961PBC V961PBC-33 V961PBC-40 V96BMC V96SSC
    Text: V961PBC Rev. B2 LOCAL BUS TO PCI BRIDGE FOR MULTIPLEXED A/D PROCESSORS • Glueless interface between Intel i960Jx, IBM PPC401Gx, processors and PCI bus • Dual bi-directional address space remapping • On-the-fly byte order endian conversion • Fully compliant with PCI 2.1 specification


    Original     		V961PBC i960Jx, PPC401Gx, 16MHz 40MHz AD14 AD30 PPC401GF V292PBC V961PBC-33 V961PBC-40 V96BMC V96SSC PDF

    V292PBC

    Abstract: V960PBC V961PBC V962PBC
    Text: V3 Technical Note July 10, 1998 Stepping Change Notification: PBC ‘B2’ Step to EPC ‘A0’ Step Rev 1.30 Includes the V292PBC, V960PBC, V961PBC, and V962PBC EPC ‘A0’ was previously referred to as stepping PBC ‘C0’ The PBC is currently shipping at stepping level ‘B2’. In Q2 1997 V3 Semiconductor


    Original     		V292PBC, V960PBC, V961PBC, V962PBC V961PBC V962PBC V292PBC V960PBC PDF

    PPC401GF

    Abstract: V292PBC V960PBC V960PBC-33 V961PBC V961PBC-33 V961PBC-40 V962PBC V962PBC-33 V962PBC-40
    Text: VxxxPBC Rev. B2 LOCAL BUS TO PCI BRIDGE CONTROLLERS Data Sheet Addendum • I2OTM ready hardware messaging unit • Large, 576-byte FIFOs using V3’s unique DYNAMIC BANDWIDTH ALLOCATION architecture • 2 channel DMA controller • 33MHz and 40MHz local bus versions available


    Original     		576-byte 33MHz 40MHz 33MHz V960PBC V961PBC 2348G PPC401GF V292PBC V960PBC-33 V961PBC-33 V961PBC-40 V962PBC V962PBC-33 V962PBC-40 PDF

    AD29

    Abstract: AD30 V350EPC V350EPC-33 V350EPC-40 V960PBC V961PBC V96BMC
    Text: V350EPC Rev. A0 LOCAL BUS TO PCI BRIDGE FOR MULTIPLEXED A/D PROCESSORS • Glueless interface to Intel’s i960Jx and IBM’s PowerPCTM 401Gx processors • On-the-fly byte order endian conversion • I2O ATU and messaging unit including hardware controlled circular queues


    Original     		V350EPC i960Jx 401Gx 640-byte 64-byte V350EPC 2348G AD29 AD30 V350EPC-33 V350EPC-40 V960PBC V961PBC V96BMC PDF

    AD29

    Abstract: AD30 V350EPC V350EPC-33 V350EPC-40 V960PBC V961PBC V96BMC
    Text: V350EPC Rev. A0 / A1 LOCAL BUS TO PCI BRIDGE FOR MULTIPLEXED A/D PROCESSORS • Glueless interface to Intel’s i960Jx and IBM’s PowerPC TM 401Gx processors • On-the-fly byte order endian conversion • I2O ATU and messaging unit including hardware controlled circular queues


    Original     		V350EPC i960Jx 401Gx 640-byte 64-byte V350EPC 2348G AD29 AD30 V350EPC-33 V350EPC-40 V960PBC V961PBC V96BMC PDF

    AD12

    Abstract: AD14 AD30 V292PBC V962PBC V962PBC-33 V962PBC-40 V96BMC
    Text: V962PBC Rev. B2 LOCAL BUS TO PCI BRIDGE FOR DE-MULTIPLEXED A/D PROCESSORS • Dual bi-directional address space remapping • Glueless interface between Intel i960 Cx/Hx processors and PCI bus • On-the-fly byte order endian conversion • Fully compliant with PCI 2.1 specification


    Original     		V962PBC 16MHz 40MHz V962PBC AD12 AD14 AD30 V292PBC V962PBC-33 V962PBC-40 V96BMC PDF

    altera epm7032

    Abstract: M68060 MC68030 MCF5102 MPC860 V292BMC V292PBC
    Text: Application Note: Introduction to interfacing the M68K, ColdFire and PowerQUICC CPUs to the PCI Bus V292PBC interface chip from V3 makes it easy! 1. Objective This application note describes how to interface 32-bit synchronous Motorola M680x0,


    Original     		M68KTM, V292PBC 32-bit M680x0TM, V292PBC V292BMC M680X0 MC68030TM, altera epm7032 M68060 MC68030 MCF5102 MPC860 V292BMC PDF

    I960SX

    Abstract: No abstract text available
    Text: V350EPC Rev. A0 LOCAL BUS TO PCI BRIDGE FOR MULTIPLEXED A/D PROCESSORS • Glueless interface to Intel’s i960Jx and IBM’s PowerPCTM 401Gx processors • On-the-fly byte order endian conversion • I2O ATU and messaging unit including hardware controlled circular queues


    Original     		V350EPC i960Jx 401Gx 640-byte 64-byte 8/16-bit 32-bit 16-bit I960SX PDF

    heartbeat counter

    Abstract: PPC401GF V960PBC V961PBC V96SSC V96SSC-33LP AD1065 ppc401
    Text: V96SSC Rev. B1 HIGH-INTEGRATION SYSTEM CONTROLLER FOR i960Sx/Jx AND PowerPC 401Gx PROCESSORS • Direct interface to i960Sx/Jx and PPC401Gx processors • High-performance burst DRAM controller • System watchdog and heartbeat timers • 16 general purpose I/O bits


    Original     		V96SSC 401Gx i960Sx/Jx PPC401Gx 33MHz 8/16-bit 100-pin i960Sx i960Jx 32-bit heartbeat counter PPC401GF V960PBC V961PBC V96SSC-33LP AD1065 ppc401 PDF

    Untitled

    Abstract: No abstract text available
    Text: ^004200 □□□□102 MST • V961PBC •" V Rev. B1 LOCAL BUS TO PCI BRIDGE FOR i960 Jx AND PowerPC 401 Gx PROCESSORS " • Glueless interface between ¡960Jx, PPC401 Gx processors and the PCI bus • Large, 576-byte FIFOs using V3's unique D y n a m ic B a n d w id t h A l l o c a t i o n ™ architecture


    OCR Scan     		V961PBC 960Jx, PPC401 576-byte 33MHz 160-pin V960PBC, V961PBC, V962PBC, V292PBC PDF

    Untitled

    Abstract: No abstract text available
    Text: V961PBC Rev. B2 LOCAL BUS TO PCI BRIDGE FOR MUTLTELEXED A/D PROCESSORS • Glueless interface between Intel ¡960Jx, IBM PPC401Gx, processors and PCI bus • Fully compliant with PCI 2.1 specification • Configurable for primary master, bus master, or target operation


    OCR Scan     		V961PBC 960Jx, PPC401Gx, 8/16-bit V961PBC 234SG PDF

    Untitled

    Abstract: No abstract text available
    Text: V960PBC Rev. B2 LOCAL BUS TO PCI BRIDGE FOR ¡960 Sx PROCESSORS • Glueless interface between Intel ¡960Sx, processors and PCI bus • Fully compliant with PCI 2.1 specification • Configurable for primary master, bus master, or target operation • Up to 1 Kbyte burst access support on both local


    OCR Scan     		V960PBC 960Sx, 8/16-bit V960PBC LAD24â V961PBC. PDF

    Untitled

    Abstract: No abstract text available
    Text: V292PBC S LOCAL BUS TO PCI BRIDGE FOR DE-MULTIPLEXED A/D PROCESSORS • Glueless interface between AMD’s Am29030/ 40 processors and PCI bus • Fully compliant with PCI 2.1 specification • Configurable for primary master, bus master, or target operation


    OCR Scan     		V292PBC Am29030/ 234SG PDF

    Untitled

    Abstract: No abstract text available
    Text: T 0 Q 4 E D 0 D D D O H b b 212 V292BMC Rev. D HIGH PERFORMANCE BURST DRAM CONTROLLER :.V “ FOR Am29030/40 PROCESSORS • Pin/Software compatible with earlier V292BMC. • Integrated Page Cache Management. • Direct interfaces to Am29030/40 processors.


    OCR Scan     		V292BMC Am29030/40 V292BMC. 512Mb 24-bit 40MHz 132-pin 160-pin V960PBC, PDF

    V360EPC

    Abstract: 1gg7 Extended Sector Remapper V3 Semiconductor V350EPC design of dma controller using vhdl eeprom programmer schematic 24c02 V292PBC V960PBC V961PBC
    Text: Chapter 1 Introduction In a very short period of tim e the PCI bus standard has moved beyond the PC to become the most w idely accepted high-performance bus standard for embedded applications. As a leader in providing chipset solutions for high-end embedded applications, V3 Sem iconductor


    OCR Scan     		Am29Kâ 960/Am29K V350EPC V96SSC V360EPC 1gg7 Extended Sector Remapper V3 Semiconductor design of dma controller using vhdl eeprom programmer schematic 24c02 V292PBC V960PBC V961PBC PDF

    Untitled

    Abstract: No abstract text available
    Text: • V yf V962PBC f ^ « K O • Rev. B1 LOCAL BUS TO PCI BRIDGE FOR i960 Cx/Hx PROCESSORS / * 5 • Glueless interface between ¡960Cx/Hx processors and the PCI bus • 2 channel DMA controller • Bi-directional mailboxes w/doorbell interrupts • Large, 576-byte FIFOs using V 3 ’s unique


    OCR Scan     		V962PBC 960Cx/Hx 576-byte 33MHz 16MHz 40MHz PDF

    Untitled

    Abstract: No abstract text available
    Text: • TD042DD 0000132 V292PBC 117 Rev. B1 LOCAL BUS TO PCI BRIDGE FOR Am29K PROCESSORS '« IC O * ” ’ • Glueless interface between Am29030/40 processors and the PCI bus • Large, 576-byte FIFOs using V3’s unique D y n a m ic B a n d w id t h A l l o c a t i o n ™ architecture


    OCR Scan     		TD042DD V292PBC Am29Kâ Am29030/40 576-byte 33MHz i00420D 160-pin V960PBC, V961PBC, PDF

    PJ3N

    Abstract: No abstract text available
    Text: . . y lf • * ▼ • =1004200 0 0 0 0 0 2 1 V96DPC f « 450 ■ Rev. B1 LOCAL BUS TO PCI BRIDGE FOR i960 Cx/Hx/Jx/Sx AND PowerPC 40lGx PROCESSORS • Glueless interface between i960Sx/Jx/Cx/Hx, PPC401 Gx processors and two PCI buses • On-the-fly byte order endian conversion


    OCR Scan     		V96DPC 40lGx i960Sx/Jx/Cx/Hx, PPC401 160-pin VU1150A V960PBC, V961PBC, V962PBC, V292PBC PJ3N PDF

    PPC401

    Abstract: MAS 10 RCD V3 SEMICONDUCTOR I960SA V96SSC AV9154-04
    Text: Chapter 1 Introduction to the V96SSC The V96SSC High-lntegration System Controller provides many of the common peripheral functions required to build a high-performance ¡960 Sx or ¡960Jx processor based system in one low-cost component. The V96SSC coupled with DRAM, ROM, and one of Intel’s


    OCR Scan     		V96SSC V96SSC 960Jx 960Sx 960Sx, PPC401 MAS 10 RCD V3 SEMICONDUCTOR I960SA AV9154-04 PDF

    Untitled

    Abstract: No abstract text available
    Text: Chapter 1 Introduction In a very short period of tim e the PCI bus standard has moved beyond the PC to become the most w idely accepted high-perform ance bus standard for embedded applications. As a leader in providing chipset solutions for high-end embedded applications, V3 Sem iconductor


    OCR Scan     		Am29Kâ 960/Am29K V350EPC pin91 V96SSC PDF

    Untitled

    Abstract: No abstract text available
    Text: V962PBC S LOCAL BUS TO PCI BRIDGE FOR DE-MULTIPLEXED A/D PROCESSORS • Glueless interface between Intel ¡960 Cx/Hx processors and PCI bus • Fully compliant with PCI 2.1 specification • Configurable for primary master, bus master, or target operation


    OCR Scan     		V962PBC 234SG PDF

    Untitled

    Abstract: No abstract text available
    Text: - V 9 6 1 P B C Rev. B1 LOCAL BUS TO PCI BRIDGE FOR i960 Jx AND PowerPC 401 Gx PROCESSORS yi '« IC O * ’ • Glueless interface between i960Jx, PPC401Gx processors and the PCI bus • Large, 576-byte FIFOs using V3’s unique D y n a m ic B a n d w id t h A l l o c a t io n ™ architecture


    OCR Scan     		i960Jx, PPC401Gx 576-byte 33MHz 16MHz 40MHz PDF