of TX6A RX6A
Abstract: RX6A tx2c transmitter RX6a 1211 TX1B TXC-06885 diode GFP AA tx6c TX5b rx5b Ethernet over SONET mapper
Text: Envoy -CE4 Device SPI-3 to Ethernet Controller TXC-06885 DATA SHEET PRODUCT PREVIEW • 4 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbits/s) or 2 Fast Ethernet ports with extended buffers or 1 Gigabit Ethernet port (10/100/1000 Mbits/s)
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TXC-06885
TXC-06885-MB,
of TX6A RX6A
RX6A
tx2c transmitter
RX6a 1211
TX1B
diode GFP AA
tx6c
TX5b rx5b
Ethernet over SONET mapper
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ups circuit diagram using idvr
Abstract: No abstract text available
Text: Spansion Analog and Microcontroller Products The following document contains information on Spansion analog and microcontroller products. Although the document is marked with the name “Fujitsu”, the company that originally developed the specification, Spansion
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MC100LVE111
Abstract: SPARC v9 architecture BLOCK DIAGRAM
Text: STP5110A July 1997 UltraSPARC -I CPU Module DATA SHEET 167 MHz UltraSPARC-I + 0.5 MB E-Cache + UDBs DESCRIPTION The UltraSPARC-I module is a high performance, SPARC V9 compliant, small form factor processor module, which interfaces to the UltraSPARC Port Architecture UPA interconnect bus.
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STP5110A
32kx36
32kx36
MC100LVE111
STP5110AUPA-167
STP1030A)
SPARC v9 architecture BLOCK DIAGRAM
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BY575
Abstract: 28BZ 8 PINS J-354W display 16119
Text: 501-4126 3D 501-4127 (2D) July 1997 FFB DATA SHEET High Performance UPA Based 24-bit Frame Buffer DESCRIPTION The Fast Frame Buffer (FFB) is a high performance UPA based 24-bit frame buffer with an integer rendering pipeline for use in demanding graphic applications. It is a UPA slave-only, non-cached, PIO graphics output
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24-bit
BY575
28BZ 8 PINS
J-354W
display 16119
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fujitsu mb90f
Abstract: upc 2851 v bnt 801 v1.1 MB90F DN-13 bnt 801 K 2232 DC-06 c914 MB90F378
Text: Corporate names revised in the documents The Fujitsu Limited reorganized its LSI business into a wholly owned subsidiary, the Fujitsu Microelectronics Limited on March 21, 2008. The corporate names “Fujitsu” and “Fujitsu Limited” described all in this document have been
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CM44-10135-1E
F2MC-16LX
16-BIT
MB90378
F2MC-16L.
F2MC-16LX
fujitsu mb90f
upc 2851 v
bnt 801 v1.1
MB90F
DN-13
bnt 801
K 2232
DC-06
c914
MB90F378
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Untitled
Abstract: No abstract text available
Text: FUJITSU MICROELECTRONICS DATA SHEET DS07-13729-2E 16-bit Proprietary Microcontroller CMOS F2MC-16LX MB90370 Series MB90372/F372/V370 • DESCRIPTION The MB90370 series is a line of general-purpose, 16-bit microcontrollers designed for those applications which
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DS07-13729-2E
16-bit
F2MC-16LX
MB90370
MB90372/F372/V370
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Display 7 segment DA05
Abstract: 5up1 Display 7 segment DA04 MB90372 TH 4300 C/R TWT d1111 P8273 3DU1 da05 7 segments SC st Duplex adapter
Text: FUJITSU SEMICONDUCTOR DATA SHEET Version 1.3 16-bit Proprietary Microcontroller CMOS F2MC-16LX MB90370 Series MB90372/F372/V370 DESCRIPTION The MB90370 series is a line of general-purpose, 16-bit microcontrollers designed for those applications which require high-speed real-time processing. The instruction set is designed to be optimized for controller applications
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16-bit
F2MC-16LX
MB90370
MB90372/F372/V370
Display 7 segment DA05
5up1
Display 7 segment DA04
MB90372
TH 4300 C/R TWT
d1111
P8273
3DU1
da05 7 segments
SC st Duplex adapter
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SPARC v9 architecture BLOCK DIAGRAM
Abstract: UltraSPARC ii sparc sparc v7 STP1031LGA Sinak h30
Text: STP1031 July 1997 UltraSPARC -II DATA SHEET Second Generation SPARC v9 64-Bit Microprocessor With VIS DESCRIPTION The STP1031, UltraSPARC–II, is a high-performance, highly-integrated superscalar processor implementing the SPARC-V9 64-bit RISC architecture. The STP1031 is capable of sustaining the execution of up to four
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STP1031
64-Bit
STP1031,
STP1031
STP1031LGA
SPARC v9 architecture BLOCK DIAGRAM
UltraSPARC ii
sparc
sparc v7
STP1031LGA
Sinak h30
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64KX1
Abstract: No abstract text available
Text: STP5111A July 1997 UltraSPARC -I CPU Module DATA SHEET 200 MHz UltraSPARC-I + 1 MB E-Cache + UDBs DESCRIPTION The UltraSPARC-I module is a high performance, SPARC V9 compliant, small form factor processor module, which interfaces to the UltraSPARC Port Architecture UPA interconnect bus.
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STP5111A
32kx36
64kx18
MC10ELV111
STP5111AUPA-200
STP1030A)
64KX1
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dc05 7 segments
Abstract: Display 7 segment DC05 Display 7 segment DA05 LB4 bridge diode dc05 7 DISPLAY segments DN11 UPA12 F2MC-16LX LQFP-144 MB90370
Text: FUJITSU SEMICONDUCTOR DATA SHEET DS07-13729-1E 16-bit Proprietary Microcontroller CMOS F2MC-16LX MB90370/375 Series MB90372/F372/F377/V370 • DESCRIPTION The MB90370/375 series is a line of general-purpose, 16-bit microcontrollers designed for those applications
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DS07-13729-1E
16-bit
F2MC-16LX
MB90370/375
MB90372/F372/F377/V370
F0402
dc05 7 segments
Display 7 segment DC05
Display 7 segment DA05
LB4 bridge diode
dc05 7 DISPLAY segments
DN11
UPA12
LQFP-144
MB90370
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TX1C/TX2C
Abstract: No abstract text available
Text: TM Envoy-CE4 Device SPI-3 to Ethernet Controller TXC-06885 DATA SHEET PRODUCT PREVIEW TXC-06885-MB, Ed. 3 August 2004 FEATURES APPLICATIONS • 4 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbits/s) or 2 Fast
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TXC-06885
TXC-06885-MB,
TX1C/TX2C
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TXC06880BROG
Abstract: TXC-06880BIOG TXC-06880 TXC-06880-MB txc06880biog CHN 612 diode CHN 615 TranSwitch TXC-06880BIOG TX4B chn G4 210
Text: TM Envoy-CE2 Device SPI-3 to Ethernet Controller TXC-06880 DATA SHEET TXC-06880-MB, Ed. 5 July 2006 FEATURES APPLICATIONS • 2 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbit/s), 2 Fast Ethernet
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TXC-06880
TXC-06880-MB,
TXC06880BROG
TXC-06880BIOG
TXC-06880
TXC-06880-MB
txc06880biog
CHN 612 diode
CHN 615
TranSwitch TXC-06880BIOG
TX4B
chn G4 210
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TXC-06885BIOG
Abstract: TXC-06885BrOG TXC-06885 gdtx diode GFP AA TX2C B TX4B CMAC 1553 RX6a 1211 txc-0688
Text: TM Envoy-CE4 Device SPI-3 to Ethernet Controller TXC-06885 DATA SHEET PRELIMINARY TXC-06885-MB, Ed. 6A February 2005 FEATURES APPLICATIONS • 4 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbit/s), 2 Fast Ethernet
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TXC-06885
TXC-06885-MB,
TXC-06885BIOG
TXC-06885BrOG
TXC-06885
gdtx
diode GFP AA
TX2C B
TX4B
CMAC 1553
RX6a 1211
txc-0688
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rx6a
Abstract: TX4B diode GFP AA RX6a 1211 TX7A TX-4C customer provisioning TX5b rx5b OC-3 Ethernet over SONET Mapper tx2c rx2c
Text: Envoy -CE4 Device SPI-3 to Ethernet Controller TXC-06885 DATA SHEET PRODUCT PREVIEW • 4 Configurable Media Access Controllers MACs • Each MAC is configurable as 8 Fast Ethernet ports (10/100 Mbits/s) or 2 Fast Ethernet ports with extended buffers or 1 Gigabit Ethernet port (10/100/1000 Mbits/s)
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TXC-06885
TXC-06885-MB,
rx6a
TX4B
diode GFP AA
RX6a 1211
TX7A
TX-4C
customer provisioning
TX5b rx5b
OC-3 Ethernet over SONET Mapper
tx2c rx2c
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STP5111
Abstract: No abstract text available
Text: S un M ic r o e l e c t r o n ic s July 1997 UltraSPARC -! CPU Module DATA SHEET 200 MHz UltraSPARC-1 + 1 MB E-Cache + UDBs D e s c r ip t io n The UltraSPARC-1 module is a high performance, SPARC V9 compliant, small form factor processor module, which interfaces to the UltraSPARC Port Architecture UPA interconnect bus.
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32kx36
64kxl8
MC10ELV111
5111AUPA-200
STP1030A)
STP5111
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UltraSPARC ii
Abstract: PI-275 UltraSPARC IIIi
Text: S un M icroelectronics July 1997 FFB DATASHEET High Performance UPA Based 24-bit Frame Buffer D e s c r ip t io n The Fast Frame Buffer FFB is a high performance UPA based 24-bit frame buffer with an integer rendering pipeline for use in demanding graphic applications. It is a UPA slave-only, non-cached, PIO graphics output
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24-bit
UltraSPARC ii
PI-275
UltraSPARC IIIi
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Untitled
Abstract: No abstract text available
Text: STP5110A S un M ic r o e l e c t r o n ic s J u ly 1997 UltraSPARC -! CPU Module DATA SHEET 167 MHz UltraSPARC-I + 0.5 MB E-Cache + UDBs D e s c r ip t io n The UltraSPARC-I m odule is a high perform ance, SPARC V9 com pliant, small form factor processor module,
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STP5110A
32kx36
32kx36
MC100LVE111
5110AUPA-167
STP1030A)
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Untitled
Abstract: No abstract text available
Text: SME5222AUPA-400 microsystems Ju ly 1999 _ UltraSPARC -!! CPU Module DATASHEET 400 MHz CPU, 2.0 MB E-Cache M o d u l e D e s c r ip t io n The U ltraSPARC™ -II, 400 M H z CPU, 2.0 M byte E-cache module, SM E5222AUPA-400 , delivers high perfor
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SME5222AUPA-400
E5222AUPA-400)
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Untitled
Abstract: No abstract text available
Text: STP5111A S un M ic r o e l e c t r o n ic s J u ly 1997 UltraSPARC -! CPU Module DATA SHEET 200 MHz UltraSPARC-1 + 1 MB E-Cache + UDBs D e s c r ip t io n The UltraSPARC-I m odule is a high perform ance, SPARC V9 com pliant, small form factor processor module,
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STP5111A
32kx36
MC10ELV111
PA-200
STP1030A)
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upa64
Abstract: UPA128 STP221
Text: S un M icroelectronics July 1997 u se Uniprocessor System Controller DATA SHEET D e s c r ip t io n The Uniprocessor System Controller USC has a DRAM memory controller and functions to regulate the flow of requests and data on the UPA bus. It also controls the resets going to all UPA clients.
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SS-10/SS-20-type
128-MB
225-pin
STP2200ABGA-83
STP2200ABGA-100
upa64
UPA128
STP221
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PSA B20 0110
Abstract: Sun UltraSparc T1 UltraSPARC ii ultrasparc
Text: S un M icro electro nics Ju ly 1997 U ltr a S P A R C DATA SHEET -!! Second Generation SPARC v9 64-Bit Microprocessor With VIS D e s c r ip t io n The STP1031, U ltraSPA R C -II, is a high-perform ance, highly-integrated superscalar processor im plem enting
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64-Bit
STP1031,
STP1031
STP1031LGA
PSA B20 0110
Sun UltraSparc T1
UltraSPARC ii
ultrasparc
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Untitled
Abstract: No abstract text available
Text: SME5222UPA-400 microsystems May 1999 _ UltraSPARC -!! CPU Module DATASHEET 400 MHz CPU, 2.0 MB E-Cache M o d u l e D e s c r ip t io n The U ltraSPARC™ -II, 400 M H z CPU, 2.0 M byte E-cache module, SM E5222UPA-400 , delivers high perfor m ance com puting in a com pact design. Based on the UltraSPARC™ -II CPU, this m odule is designed using a
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SME5222UPA-400
E5222UPA-400)
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Untitled
Abstract: No abstract text available
Text: microsystems M ay 1999 UltraSPARC“-II CPU Module DATASHEET 400 MHz CPU, 4.0 MB E-Cache M o d u l e D e s c r ip t io n The U ltraSPARC -II, 400 M H z CPU, 4.0 M byte module, SM E5224UPA-400 delivers high perform ance com puting in a com pact design. Based on the UltraSPARC™ II CPU, this m odule is designed using a small
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E5224UPA-400)
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DAC-IC8BC
Abstract: ads-835 ADM-14B mv-1606 AM-6210 ADS-835A ADS-835B SHM-IC-1 AM552 SHM-363
Text: DDÄTEL Customer Price List Effective April, 1997 IN N O V A T IO N a n d E X C E L L E N C E Prices in U.S. Dollars ORDERING GUIDE This ordering guide is presented as a procedural guide. For a formal statement o f policies, refer to the TERMS AND CONDITIONS OF SALE found on the Quotation form or on the Customer Acknowledgement copy o f the Sales Order.
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salX-826/883
DM-9000
DM-31
ST-702
ST-705
24Vdc
12Vdc
DMS-30
DMS-20
DAC-IC8BC
ads-835
ADM-14B
mv-1606
AM-6210
ADS-835A
ADS-835B
SHM-IC-1
AM552
SHM-363
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