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    TTL 74LS11 Search Results

    TTL 74LS11 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LS112P-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74LS11FPEL-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74LS11P-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74LS112FPEL-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    SNJ5480J Rochester Electronics LLC Adder/Subtractor, TTL, CDIP14, Visit Rochester Electronics LLC Buy

    TTL 74LS11 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LS08 fan-in

    Abstract: 74LS398 74LS273 74LS14 Hex Inverter definition MC74F579 74LS181 74ls795 74LS299 Decade Up/Down counter 3 State ttl buffer 74LS245
    Text: Selection Information FAST/LS TTL 1 Circuit Characteristics 2 Design Considerations, Testing and Applications Assistance Form 3 FAST Data Sheets 4 LS Data Sheets 5 Reliability Data 6 Package Information Including Surface Mount 7 FAST AND LS TTL DATA CLASSIFICATION


    Original     		PDF 81LS96) 81LS97) 81LS98) 74LS08 fan-in 74LS398 74LS273 74LS14 Hex Inverter definition MC74F579 74LS181 74ls795 74LS299 Decade Up/Down counter 3 State ttl buffer 74LS245

    FZH115B

    Abstract: fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
    Text: Digital I.C.s, 74INTEGRATED CIRCUITS DIGITAL TTL, 74LS & 74HC Series Quad 2-input NAND gate Quad 2-input NAND gate, open collector Quad 2-input NOR gate Quad 2-input NOR gate, open collector Hex inverter Hex inverter, O/C collector Hex inverter, Buffer 30V O/P


    Original     		PDF 74INTEGRATED Line-to-10 150ns 16-DIL 150ns 18-pin 250ns 300ns FZH115B fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104

    SN7401

    Abstract: sn29601 SN7449 SN74298 SN74265 MC3021 SN54367 sn74142 signetics 8223 9370c
    Text: INDEX PAGE TTL Integrated Circuits Mechanical Data 1 TTL Interchangeability Guide 6 Functional Selection Guide 19 Explanation of Function Tables 38 54/74 Families of Compatible TTL Circuits 40 TTL INTEGRATED CIRCUITS MECHANICAL DATA J ceramic dual-in-line package


    OCR Scan     		PDF 24-lead SN74S474 SN54S475 SN74S475 SN54S482 SN74S482 LCC4270 SN54490 SN74490 SN54LS490 SN7401 sn29601 SN7449 SN74298 SN74265 MC3021 SN54367 sn74142 signetics 8223 9370c

    74LS82

    Abstract: 74LS176 74LS94 74LS286 74ls150 74LS177 74LS116 74ls198 7400 TTL 74ls521
    Text: GOULD 4055916 GOULD SEMICONDUCTOR SEMICONDUCTOR DIV DIV 03E D | 03E MDSSTlb 09920 D UCICmEU T-4 3I-V 7400 TTL Cells •> GOULD CM OS Gate Array and Standard Cell Library Electronics Features General Description • Over 200 functions available. 7400 TTL Cells, a member of Gould’s EXPERT ASIC


    OCR Scan     		PDF

    Z427

    Abstract: FL 9014 TTL 7409 TTL 7486 74LS32 74ls86 TTL 74s32 74LS08 74LS11 74LS02
    Text: FAIRCHILD DIGITAL TTL SSI FUNCTIONS Cont’d X to x n agic/Conne Diagram igh Speed 54H/74H ns/22 mW O IO U) —1 ligh Speed Schottky 54S/74S ns/19 mW CO Std. TTL 54/74 1 ns/10 mW E a> Dw Power Schottky ILS/74LS ns/2 mW ~'c o u c 3 U. 9000 Series ns/10 mW


    OCR Scan     		PDF ns/10 54S/74S ns/19 54H/74H ns/22 ILS/74LS 54LS/74LS02 54S/74S02 54LS/74LS27 Z427 FL 9014 TTL 7409 TTL 7486 74LS32 74ls86 TTL 74s32 74LS08 74LS11 74LS02

    74LS08 Quad 2-Input AND Gates

    Abstract: TTL 74s32 TTL 7408 or 2 input 74Ls32 74LS11 and 74LS32 74ls32 quad 2-input OR gates 54LS TTL 7421 74LS 3-input NOR 74LS11
    Text: FAIRCHILD DIGITAL TTL High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW Logic/Connection Diagram'2’ E £ Std. TTL 54/74 10 ns/10 mW ~c o o c S U. Low Power Schottky 54LS/74LS 5 ns/2 mW Cont’d 9000 Series 8 ns/10 mW SSI FUNCTIONS 5


    OCR Scan     		PDF ns/10 54H/74H ns/22 54S/74S ns/19 54LS/74LS 54LS/74LS02 54LS/74LS27 54LS/74LS260 74LS08 Quad 2-Input AND Gates TTL 74s32 TTL 7408 or 2 input 74Ls32 74LS11 and 74LS32 74ls32 quad 2-input OR gates 54LS TTL 7421 74LS 3-input NOR 74LS11

    Untitled

    Abstract: No abstract text available
    Text: LS TTL DN74LS Series D N 7 4 LS1 1 2 DN74LS112 i0 7 ^ IS ¡ ¡ ^ Dual J-K Negative Edge-Triggered Flip-Flops with Set and Reset H Description P -2 DN 74LS112 contains two negative-edge triggered J-K flipflop circuits, each w ith independent clock-CP, J, K, and


    OCR Scan     		PDF DN74LS DN74LS112 74LS112

    Untitled

    Abstract: No abstract text available
    Text: LS TTL DN74LS Series DN74LS11 DN74LS11 D^74LS11 Triple 3-input P ositive AND Gates • Description P-1 D N 74L S 11 contains three 3-input positive isolation AND gate circuits. I Features • Low pow er consum ption P d = 13mW typical • High speed ( t pii = 9ns typical)


    OCR Scan     		PDF DN74LS DN74LS11 DN74LS11 74LS11 14-pin SO-14D) MA161.

    logic diagram of 7432

    Abstract: CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi lyi rn


    OCR Scan     		PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, logic diagram of 7432 CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL

    IC TTL 7432

    Abstract: 74LS86 gate diagram 7411 3 INPUT AND gate IC 7432 7411 pin diagram 74LS266 IC 7486 74LS series logic gate symbols FL 9014 TTL 74126
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi lyi rn


    OCR Scan     		PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, IC TTL 7432 74LS86 gate diagram 7411 3 INPUT AND gate IC 7432 7411 pin diagram 74LS266 IC 7486 74LS series logic gate symbols FL 9014 TTL 74126

    ALU IC 74181

    Abstract: 74181 ic pin diagram DS 7409 7480 full adder 1 bit 74LS86 full adder IC 74181 7411 3 INPUT AND gate TTL 74ls83 pin diagram of 7411 logic diagram of 7432
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 Vcc Vcc 1^1FH [iä| [vii Eòi [T| r»1 füi Fai np f i ! Föi lyi rn


    OCR Scan     		PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, ALU IC 74181 74181 ic pin diagram DS 7409 7480 full adder 1 bit 74LS86 full adder IC 74181 7411 3 INPUT AND gate TTL 74ls83 pin diagram of 7411 logic diagram of 7432

    74IS04

    Abstract: crt controller 6845 74S393 faraday xt 74IS74 74IS00 6845e crt controller 74832 block diagram of 74LS138 3 to 8 decoder
    Text: 3486347 FARADAY 84D 00245 ELECTRONICS CORP ELECTRONICS INC 04 DEÌ MONOCHROME DISPLAY CONTROLLER FARADAY FE2200 FEATURES: Generates the CRT Display Controller Clock and Other Timing Signals Uses a Crystal or a TTL Signal for Frequency Source Incorporates Complete


    OCR Scan     		PDF FE2200 -33-Cfj FE2200_ T-5Z-33- FE2200 74IS04 crt controller 6845 74S393 faraday xt 74IS74 74IS00 6845e crt controller 74832 block diagram of 74LS138 3 to 8 decoder

    stk 412 -410 power amp

    Abstract: Truth Table 7485 2 bit comparator STK power amplifier 4301 STK 463 amplifier stk 5006 stk 411 5.1 Amp Block Diagram STK 435 power amplifier stk 496 630 stk 410 22 pin STK 4301
    Text: Æk A Vm J a Order Number IPC-16A/927 Publication Number 4200127X Preliminary NATIONAL The PACE Microprocessor A Logic Designer’s Guide to Program Equivalents of TTL Functions MARCH 1976 National Semiconductor Corporation 2900 Semiconductor Drive Santa Clara, California 95051


    OCR Scan     		PDF IPC-16A/927 4200127X stk 412 -410 power amp Truth Table 7485 2 bit comparator STK power amplifier 4301 STK 463 amplifier stk 5006 stk 411 5.1 Amp Block Diagram STK 435 power amplifier stk 496 630 stk 410 22 pin STK 4301

    TTL 7486

    Abstract: FL 9014 TTL 7421 ttl 7432 TTL 7411 TTL 7409 7486 TTL 7411 74LS86 74LS08
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi ly i r n


    OCR Scan     		PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, TTL 7486 FL 9014 TTL 7421 ttl 7432 TTL 7411 TTL 7409 7486 TTL 7411 74LS86 74LS08

    CI 7408

    Abstract: 74LS series logic gates CI 7402 TTL 7408 7408 and 7408 TTL CI 74LS08 TTL 7486 7408 CI 74LS86
    Text: FAIRCHILD DIGITAL TTL Quad 2-Input 9015 3 Triple 3-Input — 4 Dual 4-Input w/Strobe — 5 Dual 4-Input Exp — 6 Dual 5-Input — Logic/Connection Diagram12* 2 High Speed Schottky 54S/74S 3 ns/19 mW — 3 LL High Speed 54H/74H 6 ns/22 mW Quad 2-Input E


    OCR Scan     		PDF ns/10 54LS/74LS 54H/74H ns/22 54S/74S ns/19 54LS/74LS02 54S/74S02 54LS/74LS27 CI 7408 74LS series logic gates CI 7402 TTL 7408 7408 and 7408 TTL CI 74LS08 TTL 7486 7408 CI 74LS86

    TTL LS 7407

    Abstract: CI 7407 CI 7402 TTL LS 7402 ls 7408 TTL 74s02 CI 74LS02 74LS27 TTL 7425 TTL 74ls02
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54S/74S30, 54LS/74LS30 Vcc NC r r r NC r D8 54S/74S133, 54LS/74LS133 D9 54S/74S134 Vcc NC r fi fi Ili ill HI Li Lil lil GND LzJ R R R R F IR R F I E RRRRRRRFl li lli lli lli J lill ill ill iJGND


    OCR Scan     		PDF 54H/74H30 54S/74S30, 54LS/74LS30 54S/74S133, 54LS/74LS133 54S/74S134 54S/74S02, 54LS/74LS02, 54LS/74LS28 74LS33 TTL LS 7407 CI 7407 CI 7402 TTL LS 7402 ls 7408 TTL 74s02 CI 74LS02 74LS27 TTL 7425 TTL 74ls02

    dm8130

    Abstract: 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76
    Text: 19 7 6 N atio n al S e m ico n d u cto r C o rp . p 1 ? I m • ' % TTL Data Book D EV IC E MIL i 2502 2503 2504 5400 54H00 54L00 54LS00 5401 54H01 54L01 54LS01 5402 54L02 54LS02 5403 54L03 54LS03 5404 54H04 54L04 54LS04 5405 54H05 54L05 54LS05 5406 5407 5408


    OCR Scan     		PDF 54H00 54L00 54LS00 54H01 54L01 54LS01 54L02 54LS02 54L03 54LS03 dm8130 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76

    7411 pin diagram

    Abstract: TTL 7408 DS 7409 74LS574 CI 7408 7407 connection diagram 74LS386 TTL 7408 DIAGRAMS 74LS08 PIN CI 74LS08
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D93 54LS/74LS379 D94 9386, 74LS266, 54LS/74LS386 D95 54LS/74LS398 r ei fi r E5i r?i n Vcc 1 4 5 12 13 4 5 7 6 14 15 17 16 lOa Ila lo b lib lo c lie lo d lid S CP Qa Qb 2 GND Vcc = Pin 20 GND = Pin 10 Vcc = Pin 16


    OCR Scan     		PDF 54LS/74LS379 74LS266, 54LS/74LS386 54LS/74LS398 54LS/74LS399 54LS/74LS574 54LS/74LSS02 O04S09 54LS/74LS11 54H/74H11 7411 pin diagram TTL 7408 DS 7409 74LS574 CI 7408 7407 connection diagram 74LS386 TTL 7408 DIAGRAMS 74LS08 PIN CI 74LS08

    TTL 74ls74

    Abstract: 74ls74 CI 7473 TTL 7474 7476 JK ttl 7474 14 PIN Jk 7476 7474 PIN DIAGRAM pin diagram 7474 7474 16 PIN
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL MASTER/SLAVE EDGE-TRIGGERED D55 9020 D60 9024, 54/74109, 54S/74S109, 54LS/74LS109 5 ui 9 D UJ -=pi (3 J Q 2 — J SD 0 CP Z o (3 4 K Ä Co “LT in > </> O a 3 -0 K Co ° I- 3 a. I- 3 O 4-0 Co ? 15 D61 54/7474, 54H/74H74,


    OCR Scan     		PDF 54S/74S109, 54LS/74LS109 54H/74H74, 54S/74S74, 54LS/74LS74 54H/74H73, 54H/74H73 54H/74H103 54S/74S113 54LS/74LS113 TTL 74ls74 74ls74 CI 7473 TTL 7474 7476 JK ttl 7474 14 PIN Jk 7476 7474 PIN DIAGRAM pin diagram 7474 7474 16 PIN

    d146

    Abstract: RS latch 74LS78 74LS114 7475 D latch d147 CI 74196 74LS112 7475 data latch fairchild 9314
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL MASTER/SLAVE D59a 54H/74H78 13 A « — 2 4— J. So Q 9— J Q U » CP CP o 1— 10 ¿ So CD 0—3 8_ K Ä Q Co —I I_ Vcc = Pin 14 GND = Pin 7 in Ü Q UJ EDGE-TRIGGERED 9 O (9 D58 54H/74H106 D59b 54H/74H108


    OCR Scan     		PDF 54H/74H78 54H/74H106 54S/74S112, 54LS/74LS112 54H/74H108 54S/74S113, 54LS/74LS113 54LS/74LS279 93L14 54LS/74LS196 d146 RS latch 74LS78 74LS114 7475 D latch d147 CI 74196 74LS112 7475 data latch fairchild 9314

    CI 7474

    Abstract: CI 7473 ci 7476 7474 D latch CI 74LS76 CI 74107 TTL 74ls76 fairchild 9024 ci 74LS74 74ls107
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL MASTER/SLAVE EDGE-TRIGGERED D55 9020 D60 9024, 54/74109, 54S/74S109, 54LS/74LS109 ui 9 D UJ 5 -=pi (3 J Q 2 — J SD 0 CP Z o (3 11 4 K Ä 0 Co “LT in > _6 12 CP 3 -0 14 K Co ° 7 o-i- CP 13 —c K Cd °


    OCR Scan     		PDF 54S/74S109, 54LS/74LS109 54H/74H74, 54S/74S74, 54LS/74LS74 54H/74H73, 54LS/74LS279 93L14 54LS/74LS196 54LS/74LS197 CI 7474 CI 7473 ci 7476 7474 D latch CI 74LS76 CI 74107 TTL 74ls76 fairchild 9024 ci 74LS74 74ls107

    7472 PIN DIAGRAM

    Abstract: 74ls112 pin diagram 74LS112 TTL 74107 74LS74 7473 pin diagram 74h106 7476 CI 7473 Jk 7476
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL MASTER/SLAVE D59a 54H/74H78 13 A 4 — J. 9— 10 So « Q — 2 J U» CP o 1— CD 0—3 ¿ So Q CP 8_ K Ä Q Co —I I_ Vcc = Pin 14 GND = Pin 7 in Ü Q UJ EDGE-TRIGGERED 9 O (9 D58 54H/74H106 D59b 54H/74H108


    OCR Scan     		PDF 54H/74H78 54H/74H106 54S/74S112, 54LS/74LS112 54H/74H108 54S/74S113, 54LS/74LS113 54H/74H73 54H/74H103 54S/74S113 7472 PIN DIAGRAM 74ls112 pin diagram 74LS112 TTL 74107 74LS74 7473 pin diagram 74h106 7476 CI 7473 Jk 7476

    7472 PIN DIAGRAM

    Abstract: 74574 74LS112 74LS74 7473 dual JK 7472 ttl TTL 7472 7472 ci CI 7473 pin diagram of ttl 7476
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL MASTER/SLAVE ui 3 Q </> “ UI 0 (9 D50 9000 D51 9001 D54 54/7470 13 2 A zz J So 0 g1 o° CP = Q. 1 H H (0 2 O O Q. EDGE-TRIGGERED ¡so J. So O « J. S d 0 —6 CP J . KC Äo Qo -n — J— K Q CD Vcc = Pin 14


    OCR Scan     		PDF 19-olâ 54H/74H71 54H/74H101 54H/74H72 54H/74H102 54H/74H73 54H/74H103 54S/74S113 54LS/74LS113 54H/74H76 7472 PIN DIAGRAM 74574 74LS112 74LS74 7473 dual JK 7472 ttl TTL 7472 7472 ci CI 7473 pin diagram of ttl 7476

    7475 D latch

    Abstract: D146 D147 ci 7475 rs latch 74LS109 74LS78 74LS107 74LS114 7475 data latch
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D82 54LS/74LS78 D81 54LS/74LS541 V cc |S5| RSj FSI F7| F»l FS1 j b j j j F5I Fä| F I j j j SD SD J Q J C CP Q — e Q 5— 9 CP K >— 12 Q K CD CD LlI l i l LiJ L il L iT I U LzJ Ll I ü ü bsJ QNO 9 3 4 li


    OCR Scan     		PDF 54LS/74LS541 54LS/74LS78 54LS/74LS168, 54LS/74LS169 54LS/74LS490 54LS/74LS373 54LS/74LS374 54LS/74LS256 54LS/74LS279 93L14 7475 D latch D146 D147 ci 7475 rs latch 74LS109 74LS78 74LS107 74LS114 7475 data latch