ACTEL CCGA 1152 mechanical
Abstract: AX125 AX2000 CQ208 CQ256 CS180 FG256 PQ208 Trd16 Axcelerator Family FPGAs
Text: v2.8 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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dunlop s 708
Abstract: PTI 30 040 ga AX125 AX2000 CS180 FG256 FG324 FG484 PQ208 M33 thermal fuse
Text: Advanced v1.5 Axcelerator Family FPGAs Le adi n g- E dg e P e rfo r ma nc e • • • • – Voltage-Referenced I/O Standards: GTL+, HSTL Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2 – Registered I/Os with 64-bit Deep FIFO on Each Pin "PerPin FIFO"
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608-bit
dunlop s 708
PTI 30 040 ga
AX125
AX2000
CS180
FG256
FG324
FG484
PQ208
M33 thermal fuse
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ACTEL CCGA 1152 mechanical
Abstract: lga 4x4 footprint AX125 AX2000 CQ208 CS180 FG256 PQ208 624-Pin tx 434
Text: v2.7 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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DP U1
Abstract: IO317 AX1000
Text: Advanced v1.5 Axcelerator Family FPGAs Leading-Edge Performance • • • • – Voltage-Referenced I/O Standards: GTL+, HSTL Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2 – Registered I/Os with 64-bit Deep FIFO on Each Pin "PerPin FIFO" – Hot-Swap Compliant I/Os (Except PCI)
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700Mb/s
339kbits
DP U1
IO317
AX1000
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GCLR
Abstract: 676P Axcelerator Family FPGAs
Text: v2.4 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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AF4 din 74
Abstract: AF2.5 din 74 diode t25 4 g8 Axcelerator Family FPGAs
Text: v2.5 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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AX1000
Abstract: n14132 SYNAPTICAD WAVEFORMER ax125c k7g4 diode AA16
Text: Advanced v1.1 Axcelerator Family FPGAs Le adi n g- E dg e P e rfo r ma nc e • • • • 350+ MHz System Performance 500+ MHZ Internal Performance High-Performance Embedded FIFOs 622Mb/s LVDS Capable I/Os S pe ci fi c at i on s • • • • • Up to 2 Million Equivalent System Gates
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622Mb/s
339kbits
AX1000
n14132
SYNAPTICAD WAVEFORMER
ax125c
k7g4
diode AA16
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Axcelerator FPGAs
Abstract: AX125 AX2000 CQ208 CS180 PQ208 M33 thermal fuse AK 1022 Axcelerator Family FPGAs
Text: v2 .1 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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700Mb/s
295kbits
Axcelerator FPGAs
AX125
AX2000
CQ208
CS180
PQ208
M33 thermal fuse
AK 1022
Axcelerator Family FPGAs
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ACTEL CCGA 1152 mechanical
Abstract: ACTEL CCGA 624 mechanical L33 thermal fuse ACTEL CCGA 1152 pin configuration actel PLL schematic footprint cqfp 240 m20 thermal fuse 115 M33 thermal fuse AX125 AX2000
Text: v2.6 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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b h21
Abstract: No abstract text available
Text: Revision 18 Axcelerator Family FPGAs Leading-Edge Performance • • • • 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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b h21
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AX1000
Abstract: No abstract text available
Text: Advanced v1.3 Axcelerator Family FPGAs Leading-Edge Performance • • • • – Voltage-Referenced I/O Standards: GTL+, HSTL Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2 – Registered I/Os with 64-bit Deep FIFO on Each Pin "PerPin FIFO" – Hot-Swap Compliant I/Os (Except PCI)
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14tains
AX1000
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AX125
Abstract: AX2000 CQ208 CQ256 FG256 FG324 PQ208 AX2000-CQ256
Text: Revision 17 Axcelerator Family FPGAs Leading-Edge Performance • • • • 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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AF367
Abstract: AK 1022 IC KA 2312 P2272 AX1000
Text: Advanced v1.6 Axcelerator Family FPGAs Le adi n g- E dg e P e rfo r ma nc e • • • • 350+ MHz System Performance 500+ MHZ Internal Performance High-Performance Embedded FIFOs 700Mb/s LVDS Capable I/Os S pe ci fi c at i on s • • • • • Up to 2 Million Equivalent System Gates
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700Mb/s
295kbits
AF367
AK 1022
IC KA 2312
P2272
AX1000
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IO191
Abstract: Axcelerator Family FPGAs
Text: v2.3 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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v1493a
Abstract: AK 1022
Text: Advanced v1.4 Axcelerator Family FPGAs Leading-Edge Performance • • • • – Voltage-Referenced I/O Standards: GTL+, HSTL Class 1, SSTL2 Class 1 and 2, SSTL3 Class 1 and 2 – Registered I/Os with 64-bit Deep FIFO on Each Pin "PerPin FIFO" – Hot-Swap Compliant I/Os (Except PCI)
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339kbits
v1493a
AK 1022
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FBGA 896
Abstract: AX125 AX2000 CS180 IDTQS32X2384 Silicon Sculptor II Axcelerator Family FPGAs
Text: Axcelerator Family FPGAs Detailed Specifications Operating Conditions Table 2-1 lists the absolute maximum ratings of Axcelerator devices. Stresses beyond the ratings may cause permanent damage to the device. Exposure to Absolute Maximum rated conditions for extended periods may affect device
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18-channel
FBGA 896
AX125
AX2000
CS180
IDTQS32X2384
Silicon Sculptor II
Axcelerator Family FPGAs
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Y51A
Abstract: 5022 amplifier 33ax
Text: A x c e l e r a to r F a m i l y F P G A s Detailed Specifications Supply Voltages VCCA VCCI Input Tolerance Output Drive Level 1.5V 1.5V 3.3V 1.5V 1.5V 1.8V 3.3V 1.8V 1.5V 2.5V 3.3V 2.5V 1.5V 3.3V 3.3V 3.3V I/ O F ea t u re s C o m p ar i s on I/O Assignment
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JESD8-11)
Y51A
5022 amplifier
33ax
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g5134
Abstract: No abstract text available
Text: v2.0 Axcelerator Family FPGAs Le adi n g- E dg e P e rfo r ma nc e • • • • 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700Mb/s LVDS Capable I/Os S pe ci fi c at i on s • • • • • Up to 2 Million Equivalent System Gates
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295kbits
g5134
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896-Pin
Abstract: smartpower IO290 Axcelerator Family FPGAs
Text: v2.2 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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MA 6013
Abstract: No abstract text available
Text: v2.5 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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AX125
Abstract: AX2000 CS180 IDTQS32X2384 Silicon Sculptor II Axcelerator FPGAs Axcelerator Family FPGAs
Text: Axcelerator Family FPGAs Detailed Specifications Operating Conditions Table 2-1 lists the absolute maximum ratings of Axcelerator devices. Stresses beyond the ratings may cause permanent damage to the device. Exposure to Absolute Maximum rated conditions for extended periods may affect device
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18-channel
AX125
AX2000
CS180
IDTQS32X2384
Silicon Sculptor II
Axcelerator FPGAs
Axcelerator Family FPGAs
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CQFP 256 PIN actel
Abstract: No abstract text available
Text: Axcelerator Family FPGAs Detailed Specifications Operating Conditions Table 2-1 lists the absolute maximum ratings of Axcelerator devices. Stresses beyond the ratings may cause permanent damage to the device. Exposure to Absolute Maximum rated conditions for extended periods may affect device
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18-channel
CQFP 256 PIN actel
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