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    TQFP 44 THERMAL RESISTANCE DATASHEET Search Results

    TQFP 44 THERMAL RESISTANCE DATASHEET Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TCTH011AE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=1μA / IDD=1.8μA / Push-pull type Visit Toshiba Electronic Devices & Storage Corporation
    TCTH022AE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=10μA / IDD=11.3μA / Push-pull type / FLAG signal latch function Visit Toshiba Electronic Devices & Storage Corporation
    TCTH021AE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=10μA / IDD=11.3μA / Push-pull type Visit Toshiba Electronic Devices & Storage Corporation
    TCTH012BE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=1μA / IDD=1.8μA / Open-drain type / FLAG signal latch function Visit Toshiba Electronic Devices & Storage Corporation
    TCTH012AE Toshiba Electronic Devices & Storage Corporation Over Temperature Detection IC / VDD=1.7~5.5V / IPTCO=1μA / IDD=1.8μA / Push-pull type / FLAG signal latch function Visit Toshiba Electronic Devices & Storage Corporation

    TQFP 44 THERMAL RESISTANCE DATASHEET Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    EP4CE6 package

    Abstract: EP4CE40 Altera EP4CE6 EP4CE55 5M240Z 5M1270Z QFN148 5m570z 5M40 5M80
    Text: Package Information Datasheet for Altera Devices DS-PKG-16.3 This datasheet provides package and thermal resistance information for Altera devices. Package information includes the ordering code reference, package acronym, leadframe material, lead finish plating , JEDEC outline reference, lead


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    PDF DS-PKG-16 EP4CE6 package EP4CE40 Altera EP4CE6 EP4CE55 5M240Z 5M1270Z QFN148 5m570z 5M40 5M80

    EP4CE15

    Abstract: MS 034 BGA and QFP Altera Package mounting Altera pdip top mark jedec package MO-247 SOIC 20 pin package datasheet QFN "100 pin" PACKAGE thermal resistance Theta JC of FBGA QFN148 EP4CE22
    Text: Altera Device Package Information Datasheet DS-PKG-16.2 This datasheet provides package and thermal resistance information for Altera devices. Package information includes the ordering code reference, package acronym, leadframe material, lead finish plating , JEDEC outline reference, lead


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    PDF DS-PKG-16 EP4CE15 MS 034 BGA and QFP Altera Package mounting Altera pdip top mark jedec package MO-247 SOIC 20 pin package datasheet QFN "100 pin" PACKAGE thermal resistance Theta JC of FBGA QFN148 EP4CE22

    GS816019T-250

    Abstract: GSI errata
    Text: Revision: 5/17/02 GS816019/33/37T Datasheet Errata Base datasheet: GS816019/33/37T, Rev.1.00, 3/2002 Product s covered in this supplement: GS816019/33/37T-250/225/200/166/150/133 Product specification(s) addressed by this supplement: Pin 14 Note: The specifications cited in the base datasheet for the products addressed by this errata remain in force except where


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    PDF GS816019/33/37T GS816019/33/37T, GS816019/33/37T-250/225/200/166/150/133 GS816019 100-Pin GS816019T-250 GSI errata

    Untitled

    Abstract: No abstract text available
    Text: Revision: 5/17/02 GS816019/33/37AT Datasheet Errata Base datasheet: GS816019/33/37AT, Rev.1.00, 3/2002 Product s covered in this supplement: GS816019/33/37AT-300/275/250/225/200 Product specification(s) addressed by this supplement: Pin 14 Note: The specifications cited in the base datasheet for the products addressed by this errata remain in force except where


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    PDF GS816019/33/37AT GS816019/33/37AT, GS816019/33/37AT-300/275/250/225/200 GS816019A 100-Pin 816019A

    ATSAMD21G18

    Abstract: No abstract text available
    Text: Atmel SAM D21E / SAM D21G / SAM D21J SMART ARM-Based Microcontroller DATASHEET SUMMARY Description The Atmel | SMART SAM D21 is a series of low-power microcontrollers using the 32-bit ARM® Cortex®-M0+ processor, and ranging from 32- to 64-pins with up to 256KB Flash and


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    PDF 32-bit 64-pins 256KB 48MHz ATSAMD21G18

    ATMEL Tape and Reel drawing

    Abstract: ATMEL Tape and Reel code JEDEC Drawing MO-220 qfn48 Atmel Moisture sensitivity level Moisture/ATMEL Tape and Reel QFN-64 ATSAMD21G18
    Text: Atmel SAM D21E / SAM D21G / SAM D21J SMART ARM-Based Microcontroller DATASHEET SUMMARY Description The Atmel | SMART SAM D21 is a series of low-power microcontrollers using the 32-bit ARM® Cortex®-M0+ processor, and ranging from 32- to 64-pins with up to 256KB Flash and


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    PDF 32-bit 64-pins 256KB 48MHz ATMEL Tape and Reel drawing ATMEL Tape and Reel code JEDEC Drawing MO-220 qfn48 Atmel Moisture sensitivity level Moisture/ATMEL Tape and Reel QFN-64 ATSAMD21G18

    ATSAMD21G18

    Abstract: No abstract text available
    Text: Atmel SAM D21E / SAM D21G / SAM D21J ARM-Based Microcontroller PRELIMINARY DATASHEET SUMMARY Description The Atmel SAM D21 is a series of low-power microcontrollers using the 32-bit ARM® Cortex®M0+ processor, and ranging from 32- to 64-pins with up to 256KB Flash and 32KB of SRAM. The


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    PDF 32-bit 64-pins 256KB 48MHz ATSAMD21G18

    ATSAMd21g18

    Abstract: JEDEC Drawing MO-220 qfn48
    Text: Atmel SAM D21E / SAM D21G / SAM D21J ARM-Based Microcontroller PRELIMINARY DATASHEET SUMMARY Description The Atmel SAM D21 is a series of low-power microcontrollers using the 32-bit ARM® Cortex®M0+ processor, and ranging from 32- to 64-pins with up to 256KB Flash and 32KB of SRAM. The


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    PDF 32-bit 64-pins 256KB 48MHz ATSAMd21g18 JEDEC Drawing MO-220 qfn48

    GSI errata

    Abstract: GS88019A GS88033A GS88037A 37at
    Text: Revision: 5/17/02 GS88019/33/37AT Datasheet Errata Base datasheet: GS88019/33/37AT, Rev.1.00, 3/2002 Product s covered in this supplement: GS88019/33/37AT-250/225/200/166/150/133 Product specification(s) addressed by this supplement: Pin 14 Note: The specifications cited in the base datasheet for the products addressed by this errata remain in force except where


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    PDF GS88019/33/37AT GS88019/33/37AT, GS88019/33/37AT-250/225/200/166/150/133 GS88019A 100-Pin 88019A GSI errata GS88033A GS88037A 37at

    Untitled

    Abstract: No abstract text available
    Text: Atmel SAM D20J / SAM D20G / SAM D20E ARM-Based Microcontroller DATASHEET SUMMARY Description The Atmel SAM D20 is a series of low-power microcontrollers using the 32-bit ARM® Cortex®-M0+ processor, and ranging from 32- to 64-pins with up to 256KB Flash and


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    PDF 32-bit 64-pins 256KB 48MHz

    ATSAMD21G18

    Abstract: No abstract text available
    Text: Atmel SAM D21E / SAM D21G / SAM D21J SMART ARM-Based Microcontroller DATASHEET SUMMARY Description The Atmel | SMART SAM D21 is a series of low-power microcontrollers using the 32-bit ARM® Cortex®-M0+ processor, and ranging from 32- to 64-pins with up to 256KB Flash and


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    PDF 32-bit 64-pins 256KB 48MHz ATSAMD21G18

    Untitled

    Abstract: No abstract text available
    Text: VSC7124 Datasheet FEATURES ● ● ● ● ● ● ● ANSI X3T11 Fibre Channel-compliant at 1.0625 Gbps IEEE 802.3z GbE-compliant at 1.25 Gbps Five-port bypass circuits PBCs On-chip transmit termination 3.3 V, 0.25 W typical power 0.35 micron CMOS, a velocity family member


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    PDF VSC7124 X3T11 44-Pin, VSC7124 VSC7127 G52293-0 1-800-VITESSE

    Untitled

    Abstract: No abstract text available
    Text: VSC7124 Datasheet FEATURES ● ● ● ● ● ● ● ANSI X3T11 Fibre Channel-compliant at 1.0625 Gbps IEEE 802.3z GbE-compliant at 1.25 Gbps Five-port bypass circuits PBCs On-chip transmit termination 3.3 V, 0.25 W typical power 0.35 micron CMOS, a velocity family member


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    PDF VSC7124 X3T11 44-Pin, VSC7124 VSC7127 G52293-0

    SiI168

    Abstract: SII168 Panel link receiver SiI-AN-0030 DVI RECEIVER PCB design guidelines Sii161 Silicon Image SiI-AN-0045 PanelLink Transmitter tqfp 64 pcb land pattern dvi dual link D 24 5
    Text: SiI 161A PanelLink Receiver Datasheet March 2001 Features The SiI 161A receiver uses PanelLink Digital technology to support high resolution displays up to UXGA. The SiI 161A receiver supports up to true color panels 24 bit/pixel, 16.7M colors in 1 or 2 pixels/clock mode. In


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    PDF SiI161ACT100 SiI-DS-0009-D 1-888-PanelLink SiI168 SII168 Panel link receiver SiI-AN-0030 DVI RECEIVER PCB design guidelines Sii161 Silicon Image SiI-AN-0045 PanelLink Transmitter tqfp 64 pcb land pattern dvi dual link D 24 5

    GS881E18A

    Abstract: GS881E18AD-166 GS881E18AD-200 GS881E18AD-225 GS881E18AD-250
    Text: Revision: 4/26/02 GS881E18/32/36AD Supplemental Datasheet Information This supplemental information applies to the GS881E18/36AT datasheet, which you will find attached to this document. This supplement includes a new package offering the 165-bump BGA—Package D , as well as an additional organization (x32, which is only


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    PDF GS881E18/32/36AD GS881E18/36AT 165-bump 165-BGA BGA--x18 GS881E18/36AT-250/225/200/166/150/133 881E18A GS881E18A GS881E18AD-166 GS881E18AD-200 GS881E18AD-225 GS881E18AD-250

    GS88118A

    Abstract: GS88118AD-166 GS88118AD-200 GS88118AD-225 GS88118AD-250
    Text: Revision: 4/26/02 GS88118/32/36AD Supplemental Datasheet Information This supplemental information applies to the GS88118/36AT datasheet, which you will find attached to this document. This supplement includes a new package offering the 165-bump BGA—Package D , as well as an additional organization (x32, which is only


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    PDF GS88118/32/36AD GS88118/36AT 165-bump 165-BGA BGA--x18 88118A GS88118A GS88118AD-166 GS88118AD-200 GS88118AD-225 GS88118AD-250

    Untitled

    Abstract: No abstract text available
    Text: Preliminary GS8150F18/32/36T-7/8/8.5/10/11 1M x 18, 512K x 32, 512K x 36 16Mb Sync Burst SRAMs 100-Pin TQFP Commercial Temp Industrial Temp Features • Flow Through mode operation; Pin 14 = No Connect • 3.3 V +10%/–5% core power supply • 2.5 V or 3.3 V I/O supply


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    PDF GS8150F18/32/36T-7/8/8 100-Pin 100-lead 8150F18

    GS840F18A

    Abstract: GS840F32A GS840F36A
    Text: Preliminary GS840F18/32/36AT-7.5/8/8.5/10/12 256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs TQFP, BGA Commercial Temp Industrial Temp Features Designing For Compatibility • Flow Through mode operation • 3.3 V +10%/–5% core power supply • 2.5 V or 3.3 V I/O supply


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    PDF GS840F18/32/36AT-7 100-lead 840F18A GS840F18A GS840F32A GS840F36A

    Untitled

    Abstract: No abstract text available
    Text: GS840FH18/32/36AT-8/8.5/10/12 TQFP Commercial Temp Industrial Temp 256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs Features • Flow Through mode operation • 3.3 V +10%/–5% core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode


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    PDF GS840FH18/32/36AT-8/8 100-lead 840FH18A

    GS840FH18AT-8

    Abstract: No abstract text available
    Text: GS840FH18/32/36AT-8/8.5/10/12 TQFP Commercial Temp Industrial Temp 256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs Features • Flow Through mode operation • 3.3 V +10%/–5% core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode


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    PDF GS840FH18/32/36AT-8/8 100-lead GS840F 840FH18A GS840FH18AT-8

    GS880F18A

    Abstract: GS880F32A GS880F36A
    Text: Preliminary GS880F18/32/36AT-5.5/6/6.5/7/7.5/8.5 100-Pin TQFP Commercial Temp Industrial Temp 512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs Features • Flow Through mode operation; Pin 14 = No Connect • 2.5 V or 3.3 V +10%/–10% core power supply


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    PDF GS880F18/32/36AT-5 100-Pin 100-lead 880F18A GS880F18A GS880F32A GS880F36A

    GS88019A

    Abstract: GS88033A GS88037A
    Text: Preliminary GS88019/33/37AT-250/225/200/166/150/133 100-Pin TQFP Commercial Temp Industrial Temp 512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs Features SCD Pipelined Reads • Single Cycle Deselect SCD operation • 2.5 V or 3.3 V +10%/–10% core power supply


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    PDF GS88019/33/37AT-250/225/200/166/150/133 100-Pin 100-lead x32/x36) 88019A GS88019A GS88033A GS88037A

    Untitled

    Abstract: No abstract text available
    Text: Preliminary GS816019/33/37T-250/225/200/166/150/133 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 100-Pin TQFP Commercial Temp Industrial Temp Features Byte Write and Global Write • Single Cycle Deselect SCD operation • 2.5 V or 3.3 V +10%/–10% core power supply


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    PDF GS816019/33/37T-250/225/200/166/150/133 100-Pin 100-lead x32/x36

    ep330

    Abstract: CLASSIC EPLD FAMILY altera EP1810
    Text: Operating Requirements for Altera Devices March 1995, ver. 6 Datasheet A ltera devices com bine unique program m able logic architectures w ith advanced C M O S processes to p rovid e exceptional perform ance and re lia b ility. To m aintain the highest possible perform ance and re lia b ility of


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