raychem manual
Abstract: marking code software EAN-13 DUN14 raychem marking code TMS-WINTOTAL-SWARE
Text: RINTERCONNECT A DIVISION OF !@#$ ELECTRONICS WinTotal Wire marking software • Powerful wire marker design and print software • Familiar Windows user environment • Pre-loaded with Raychem Interconnect identification products • Powerful import and export functions:
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Untitled
Abstract: No abstract text available
Text: CY7C1371D CY7C1373D 18-Mbit 512 K x 36/1 M × 18 Flow-Through SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Flow-through SRAM with NoBL™ Architecture Features Functional Description • No Bus Latency (NoBL) architecture eliminates dead cycles
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CY7C1371D
CY7C1373D
18-Mbit
CY7C1371D/CY7C1373D
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Untitled
Abstract: No abstract text available
Text: CY7C1371D CY7C1373D 18-Mbit 512 K x 36/1 M × 18 Flow-Through SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Flow-through SRAM with NoBL™ Architecture Features Functional Description • No Bus Latency (NoBL) architecture eliminates dead cycles
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CY7C1371D
CY7C1373D
18-Mbit
CY7C1371D/CY7C1373D
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Untitled
Abstract: No abstract text available
Text: CY7C1371D CY7C1373D 18-Mbit 512 K x 36/1 M × 18 Flow-Through SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Flow-through SRAM with NoBL™ Architecture Features Functional Description • No Bus Latency (NoBL) architecture eliminates dead cycles
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CY7C1371D
CY7C1373D
18-Mbit
133-MHz
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Untitled
Abstract: No abstract text available
Text: CY7C1371D CY7C1373D 18-Mbit 512 K x 36/1 M × 18 Flow-Through SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Flow-through SRAM with NoBL™ Architecture Features Functional Description • No Bus Latency (NoBL) architecture eliminates dead cycles
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CY7C1371D
CY7C1373D
18-Mbit
133-MHz
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Untitled
Abstract: No abstract text available
Text: CY7C1371D CY7C1373D 18-Mbit 512 K x 36/1 M × 18 Flow-Through SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Flow-through SRAM with NoBL™ Architecture Functional Description Features • No Bus Latency (NoBL) architecture eliminates dead cycles
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CY7C1371D
CY7C1373D
18-Mbit
133-MHz
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Untitled
Abstract: No abstract text available
Text: CY7C1366C, CY7C1367C 9-Mbit 256 K x 36/512 K × 18 Pipelined DCD Sync SRAM 9-Mbit (256 K × 36/512 K × 18) Pipelined DCD Sync SRAM Features Functional Description Supports bus operation up to 166 MHz Available speed grade is 166 MHz Registered inputs and outputs for pipelined operation
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CY7C1366C,
CY7C1367C
CY7C1366C/CY7C1367C
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Untitled
Abstract: No abstract text available
Text: CY7C1366C, CY7C1367C 9-Mbit 256 K x 36/512 K × 18 Pipelined DCD Sync SRAM 9-Mbit (256 K × 36/512 K × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 166 MHz ■ Available speed grade is 166 MHz ■ Registered inputs and outputs for pipelined operation
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CY7C1366C,
CY7C1367C
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Untitled
Abstract: No abstract text available
Text: CY7C1366C, CY7C1367C 9-Mbit 256 K x 36/512 K × 18 Pipelined DCD Sync SRAM 9-Mbit (256 K × 36/512 K × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 166 MHz ■ Available speed grade is 166 MHz ■ Registered inputs and outputs for pipelined operation
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CY7C1366C,
CY7C1367C
CY7C1366C/CY7C1367C
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MIL-C-17
Abstract: RG-211 MIL-W-85 M17/194-00001 M17 RG 180
Text: INTRODUCTION Times Microwave Systems designs and manufactures high performance coaxial cables, connectors and cable assemblies for a broad range of RF transmission applications. For more than 50 years, Times has been the leader in the development of new cable
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800-TMS-COAX
TL-15
MIL-C-17
RG-211
MIL-W-85
M17/194-00001
M17 RG 180
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y336
Abstract: Y164 Y165 Y143 88 TR 337 Y162 ST8601 Y163 TMS 3834 Transistor 337
Text: ST Sitronix ST8616 168 Segment Driver for STN LCD with Low-Voltage Drive PRELIMINARY Notice: This is not a final specification. Some parameters are subject to change 1 Features 168/160 output mode 4/8 bits data bus LCD drive voltage: 2.6 to 5.5 V
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ST8616
ST8616
168-channel
ST8600
ST8601.
ST8616,
2001/Dec/13
2001-Aug-24.
y336
Y164
Y165
Y143 88
TR 337
Y162
ST8601
Y163
TMS 3834
Transistor 337
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tms 3614
Abstract: 755-335 ST8600 ST 6244 A 06 / CT X112 ST8624 ST8632 x9301 X8302
Text: ST Sitronix ST8600 240 Channel Common Driver for STN LCD with High-Voltage Drive PRELIMINARY Notice: This is not a final specification. Some parameters are subject to change 1 Features Duty cycle up to 1/240 Intermediate voltage I/F LCD drive voltage: 43V max
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ST8600
ST8600
240-channel
2001/Feb/28
tms 3614
755-335
ST 6244 A 06 / CT
X112
ST8624
ST8632
x9301
X8302
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TXC07900AIBG
Abstract: TXC-07900AIBG TSOP transmitter B020H OED155TM TXC-07900-MB VTXP-6 AU-AIS dk12b EK117
Text: OED155 Device Dual STM-1 Overhead Terminator, Tributary Processor and Cross-Connect with Integrated E1 Mapper TXC-07900 PRODUCT PREVIEW DATA SHEET DESCRIPTION: ™ The Optimized Edge Device, OED155, is a dual STM-1 SDH framer and overhead terminator, virtual tributary
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OED155
TXC-07900
TXC-07900-MB,
OED155TM
TXC07900AIBG
TXC-07900AIBG
TSOP transmitter
B020H
OED155TM
TXC-07900-MB
VTXP-6
AU-AIS
dk12b
EK117
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RX1d
Abstract: 3A184
Text: AsTriX Device CellBus Expansion Switch TXC-05840 DATA SHEET The AsTriX™ TXC-05840 CellBus Expansion Switch is a single chip switching solution for ATM systems. In order to meet the accelerating need for bandwidth in access systems, the AsTriX is designed to allow higher
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TXC-05840
TXC-05804)
CUBIT-622
TXC-05805)
TXC-05860)
TXC-05810)
OC-12
16-bit
MPC850/860
TXC-05840-MB
RX1d
3A184
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TXC-07905-MB
Abstract: TXC-07905 OED622 B016H BP85H MSP SNCP h-12-H cu3ah B007H
Text: OED622 Device Dual STM-4/STM-1 Overhead Terminator, Tributary Processor and Cross-Connect with Integrated E1 Mapper TXC-07905 PRODUCT PREVIEW DATA SHEET DESCRIPTION: ™ The Optimized Edge Device, OED622, is a dual STM-4/STM-1 SDH framer and overhead terminator, virtual
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OED622
TXC-07905
TXC-07905-MB,
OED622TM
TXC-07905-MB
TXC-07905
B016H
BP85H
MSP SNCP
h-12-H
cu3ah
B007H
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POS-PHY ATM format
Abstract: No abstract text available
Text: Sertopia Device UTOPIA Serializer TXC-05860 DESCRIPTION • In-band UTOPIA and POS-PHY Level 2 operating modes for cell and packet traffic • UTOPIA Level 2, and POS-PHY operating modes for cell and packet traffic • One UTOPIA port up to 800 Mbit/s
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TXC-05860
gC-05860-MB
POS-PHY ATM format
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Untitled
Abstract: No abstract text available
Text: ASPEN-PX Device ASPEN Port Expander TXC-05811 DATA SHEET FEATURES DESCRIPTION The ASPEN-PX TXC-05811 , ASPEN Port Expander is a single chip solution for increasing the UTOPIA port density of ASPEN based systems. The ASPEN-PX device acts as a port expander enabling the ASPEN
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TXC-05811
TXC-05810B)
256-lead
TXC-05811-MB
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Line Driver SHDSL
Abstract: lan SHDSL TXC-05806 TXC-06212 DP43 metd15 DP39 AETA
Text: ASPEN-PX Device ASPEN Port Expander TXC-05811 DATA SHEET DESCRIPTION FEATURES • Interoperable with ASPEN TXC-05810B UTOPIA Level 2 interface • Provides port expansion for up to 64 UTOPIA Level 2 ports • Utilizes ASPEN ATM AccessEDGE firmware for
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TXC-05811
TXC-05810B)
256-lead
TXC-05811)
TXC-05811-MB,
Line Driver SHDSL
lan SHDSL
TXC-05806
TXC-06212
DP43
metd15
DP39
AETA
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hp-1100
Abstract: TL3M hp1100 TXC-03453B
Text: TL3M Device Triple Level 3 Mapper TXC-03453B DATA SHEET SDH/SONET SIDE TELECOM BUS O-Bit Interfaces • Add/drop multiplexers • Digital cross connect systems • Broadband switching systems • Transmission equipment External Alarm Interfaces Drop Bus
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TXC-03453B
TXC-03453B-MB,
hp-1100
TL3M
hp1100
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Untitled
Abstract: No abstract text available
Text: PHAST -12N Device STM-4/OC-12 SDH/SONET Overhead Terminator with Telecom Bus Interface TXC-06312 DESCRIPTION • Bit-serial LVPECL SDH/SONET line interface with integrated clock recovery and clock synthesis - single 622.08 Mbit/s STM-4/OC-12 signal or - four 155.52 Mbit/s STM-1/OC-3 signals
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STM-4/OC-12
TXC-06312
VC-4-Xc/STS-1/STS-3c/STC-6c/STS9c/STS-12c
TXC-06312-MB
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intel 7882
Abstract: TXC-03453AI df2a df2e TXC-03453B
Text: TL3M Device Triple Level 3 Mapper TXC-03453B DATA SHEET SDH/SONET SIDE TELECOM BUS O-Bit Interfaces • Add/drop multiplexers • Digital cross connect systems • Broadband switching systems • Transmission equipment External Alarm Interfaces Drop Bus
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TXC-03453B
TXC-03453B-MB
intel 7882
TXC-03453AI
df2a
df2e
TXC-03453B
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HDB3
Abstract: df2a SOT
Text: TL3M Device Triple Level 3 Mapper TXC-03453B DATA SHEET Each of the three channels of the TL3M can map a DS3 line signal into an STM-1 TUG-3 or STS-3 STS-1 SPE SDH/SONET signal. An E3 signal can be mapped only into an STM-1 TUG-3. The TL3M interfaces to an STM-1 or STS-3 SDH/SONET signal
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TXC-03453B
TXC-03453B-MB
HDB3
df2a SOT
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df2e
Abstract: TXC-03453 TXC-06103
Text: TL3M Device Triple Level 3 Mapper TXC-03453 DATA SHEET Each of the three channels of the TL3M can map a DS3 line signal into an STM-1 TUG-3 or STS-3 STS-1 SPE SDH/SONET signal. An E3 signal can be mapped only into an STM-1 TUG-3. The TL3M interfaces to an STM-1 or STS-3 SDH/SONET signal
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TXC-03453
TXC-03453-MB
df2e
TXC-03453
TXC-06103
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UPD 056
Abstract: CBAW
Text: ASPEN Express Device DATA SHEET PRODUCT PREVIEW FEATURES DESCRIPTION The ASPEN Express device is a single-chip solution for implementing cost-effective ATM multiplexing and switching systems, based on the CellBus architecture. Such systems are constructed from a number of CUBIT-3, CUBIT-Pro,
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TXC-05806
8/16-bit)
TXC-05806-MB
UPD 056
CBAW
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