Untitled
Abstract: No abstract text available
Text: 2 TO 6 GHz LOAD SOURCE VSWR INDEPENDENT DOWNCONVERTING MIXER MODEL: TIM0206HI2 FEATURES • IP3 independent of VSWR • RF/LO coverage. 2 to 6 GHz • IF operation. DC to 2 GHz • Input IP3 . +26 dBm typical
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TIM0206HI2
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Untitled
Abstract: No abstract text available
Text: 2 TO 6 GHz LOAD SOURCE VSWR INDEPENDENT DOWNCONVERTING MIXER MODEL: TIM0206HI2 FEATURES • IP3 independent of VSWR • RF/LO coverage .2 to 6 GHz • IF operation .DC to 2 GHz • Input IP3 .+26 dBm typical • LO/RF VSWR .1.5:1 typical
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TIM0206HI2
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Untitled
Abstract: No abstract text available
Text: 2 TO 6 GHz LOAD SOURCE VSWR INDEPENDENT DOWNCONVERTING MIXER MODEL: TIM0206HI2 FEATURES • IP3 independent of VSWR • RF/LO coverage .2 to 6 GHz • IF operation .DC to 2 GHz • Input IP3 .+26 dBm typical • LO/RF VSWR .1.5:1 typical
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TIM0206HI2
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Untitled
Abstract: No abstract text available
Text: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612G
TMS320C6472
8/16-Bit
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Untitled
Abstract: No abstract text available
Text: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612G
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
32K-Byte)
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DMX0716L
Abstract: h2731 DM0204 TB0218LW2
Text: SINGLE-, DOUBLE- AND TRIPLE-BALANCED MIXERS SBW Single Balanced Waveguide MODEL NUMBER DB, DM Double Balanced NOMINAL LO POWER dBm (Note 1) FREQUENCY RANGE RF AND LO IF (GHz) (GHz) TB, TBR Triple Balanced CONVERSION LOSS (dB) (Typ./Max.) (Note 2) LO-RF ISOLATION
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DB0118LA2
DB0218LW2
DB0418LE1
DB0418LW1
DB1218LW1
DB0226LA1
DB0426LW1
DB1826LW1
DB0130LA2
DB3336LW1
DMX0716L
h2731
DM0204
TB0218LW2
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CSR BC5
Abstract: TX01 TMS320C64x DSP Megamodule Reference Guide
Text: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612G
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
32K-Byte)
CSR BC5
TX01
TMS320C64x DSP Megamodule Reference Guide
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SCR RC10
Abstract: tim02 a15 c15 106c 12p 02B07FFF 02C30000 fcbga package weight TMS320C6000 C6000 0257FFFF LOG RX2 0808
Text: SM320C6472-HiRel www.ti.com SPRS696B – SEPTEMBER 2010 – REVISED OCTOBER 2010 SM320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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SM320C6472-HiRel
SPRS696B
SM320C6472
8/16-Bit
SCR RC10
tim02
a15 c15 106c 12p
02B07FFF
02C30000
fcbga package weight
TMS320C6000
C6000
0257FFFF
LOG RX2 0808
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SPRM316
Abstract: C6000 DDR2-533 TCI6486 TMS320C6000 TMS320TCI6486 CSR BC5 TMS320TCI6486ZTZ 070CH
Text: TMS320TCI6486 www.ti.com SPRS300I – FEBRUARY 2006 – REVISED OCTOBER 2009 TMS320TCI6486 Communications Infrastructure Digital Signal Processor Check for Samples :TMS320TCI6486 1 Features 1 • Six On-Chip TMS320C64x+ Megamodules • Endianess: Little Endian, Big Endian
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TMS320TCI6486
SPRS300I
TMS320TCI6486
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
SPRM316
C6000
DDR2-533
TCI6486
TMS320C6000
CSR BC5
TMS320TCI6486ZTZ
070CH
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MDIO controller
Abstract: C6000 DDR2-533 TMS320C6000 TMS320C64x DSP Megamodule Reference Guide BED02
Text: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and
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TMS320C6472
SPRS612B
TMS320C6472
8/16-Bit
MDIO controller
C6000
DDR2-533
TMS320C6000
TMS320C64x DSP Megamodule Reference Guide
BED02
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Untitled
Abstract: No abstract text available
Text: TMS320C6472 www.ti.com SPRS612D – JUNE 2009 – REVISED JULY 2010 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612D
TMS320C6472
8/16-Bit
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log tx 1044
Abstract: TR74 71011
Text: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and
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TMS320C6472
SPRS612B
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
log tx 1044
TR74
71011
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Untitled
Abstract: No abstract text available
Text: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612G
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
32K-Byte)
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112Bf
Abstract: SPRA387 0260F
Text: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and
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PDF
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TMS320C6472
SPRS612B
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
112Bf
SPRA387
0260F
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TB0226LW2
Abstract: TB0218LW2
Text: SINGLE-, DOUBLE- AND TRIPLE-BALANCED MIXERS SBW Single Balanced Waveguide MODEL NUMBER DB, DM Double Balanced NOMINAL LO POWER dBm (Note 1) FREQUENCY RANGE RF AND LO IF (GHz) (GHz) TB, TBR Triple Balanced CONVERSION LOSS (dB) (Typ./Max.) (Note 2) LO-RF ISOLATION
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DB0118LA2
DB0218LW2
DB0418LE1
DB0418LW1
DB1218LW1
DB0226LA1
DB0426LW1
DB1826LW1
DB0130LA2
DB3336LW1
TB0226LW2
TB0218LW2
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Untitled
Abstract: No abstract text available
Text: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 1.1 www.ti.com CTZ/ZTZ BGA Package Bottom View The TMS320C6472 devices are designed for a package temperature range of 0°C to 85°C (commercial temperature range) or -40°C to 100°C (extended temperature range).
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TMS320C6472
SPRS612G
TMS320C6472
500-MHz
625-MHz
737-Pin
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C6000
Abstract: DDR2-533 TMS320C6000 CSR BC5 LOG TX2 1108 rx2freebuffer rgmii specification tnetv Y10-Y12 002BFF
Text: TMS320C6472 www.ti.com SPRS612F – JUNE 2009 – REVISED FEBRUARY 2011 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612F
TMS320C6472
8/16-Bit
C6000
DDR2-533
TMS320C6000
CSR BC5
LOG TX2 1108
rx2freebuffer
rgmii specification
tnetv
Y10-Y12
002BFF
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TMS3TCI6486BZTZ625
Abstract: No abstract text available
Text: TMS320TCI6486 SPRS300N – FEBRUARY 2006 – REVISED JULY 2011 www.ti.com TMS320TCI6486 Communications Infrastructure Digital Signal Processor 1 Features 1 • Six On-Chip TMS320C64x+ Megamodules • Endianess: Little Endian, Big Endian • C64x+ Megamodule Main Features:
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TMS320TCI6486
SPRS300N
TMS320TCI6486
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
32K-Byte)
TMS3TCI6486BZTZ625
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71011
Abstract: No abstract text available
Text: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612G
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
32K-Byte)
71011
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Untitled
Abstract: No abstract text available
Text: SM320C6472-HiRel www.ti.com SPRS696B – SEPTEMBER 2010 – REVISED OCTOBER 2010 SM320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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SM320C6472-HiRel
SPRS696B
SM320C6472
8/16-Bit
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Untitled
Abstract: No abstract text available
Text: TMS320C6472 www.ti.com SPRS612E – JUNE 2009 – REVISED OCTOBER 2010 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612E
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
32K-Byte)
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CSR BC5
Abstract: C6472 SMC tr12
Text: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612G
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
32K-Byte)
CSR BC5
C6472
SMC tr12
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GT-64060
Abstract: 8x32 sram 0x04030201 R4000 R4640 R4650 8x32 R2000 mips processor
Text: GT-64060 High Integration PCI Bridge/ Memory Controller Preliminary Revision 1.0 8/12/97 Please contact Galileo Technology for possible updates before finalizing a design. FEATURES • High-integration PCI bridge/memory controller with three bus architecture
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GT-64060
32-bit
50MHz
150Mbytes/sec
512MB
256KB-16MB
32-bit,
GT-64060
8x32 sram
0x04030201
R4000
R4640
R4650
8x32
R2000 mips processor
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Untitled
Abstract: No abstract text available
Text: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612G
TMS320C6472
8/16-Bit
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