PD488170L
Abstract: NEC 488170L D488170L RDRAM cross reference NEC RDRAM 36 REF05
Text: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT jiiP D 4 8 8 1 7 0 L 18M-BIT Base Rambus DRAM 1M-WORD X 9-BIT X 2-BANK ★ Description The 18-Megabit Rambus DRAM RDRAM is an extremely-high-speed CMOS DRAM organized as 1M word x 9 bits x 2 banks and capable of bursting up to 256 bytes of data at 1.67 ns per byte. The use of Rambus
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18M-BIT
18-Megabit
/XPD488170L
P32G6-65A
bM27525
PD488170L
NEC 488170L
D488170L
RDRAM cross reference
NEC RDRAM 36
REF05
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Untitled
Abstract: No abstract text available
Text: CHAPTER 24 CPU INSTRUCTION SET DETAILS This chapter provides a detailed description of the operation of each V r4101 instruction in both 32- and 64-bit modes. The instructions are listed in alphabetical order. Exceptions that may occur due to the execution of each instruction are listed after the description of each
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r4101
64-bit
r4101
R4x00
Vr4101
64-bit
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m524
Abstract: LTM-185 AT01
Text: CHAPTER 1 OUTLINE /iPD78064 Subseries 1.1 O Features On-chip high-capacity ROM and RAM Type Part N u m b e r'\^ Note Data Memory Program Memory (ROM) Internal High-Speed RAM fiPD78062 16 Kbytes 512 bytes ;iPD78063 24 Kbytes 1024 bytes ¿1PD78064 32 Kbytes
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/iPD78064
fiPD78062
iPD78063
1PD78064
MPD78P064
HP9000
SM78K0)
MX78KO)
b427525
01D0247
m524
LTM-185 AT01
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nec D27c256
Abstract: D27C256 D27C256 nec PD27C256 27256 EPROM pd27256 mPD27C256 UPD27C256
Text: N E C EL ECTRONI CS I NC ifl DE^jj t. 4 2 7 5 2 5 □□1274b □ f ~ ~ T ~ Ÿ fr-S 3 mP D 2 7 C 2 5 6 3 2 ,7 6 8 X 8-BIT c m o s u v / o t p e p ro m NEC Electronics Inc. R evision i January 1986 Pin Configuration Description The f/PD27C256 is a 262,144-bit ultraviolet erasable and
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1274b
uPD27C256
144-bit
mPD27C256
28-pin
PD27C256
nec D27c256
D27C256
D27C256 nec
27256 EPROM
pd27256
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S-70L
Abstract: No abstract text available
Text: DATA SHEET M O S INTEGRATED CIRCUIT /X P D 4 2 4 4 0 0 -L 4 M-BIT DYNAMIC RAM 1 M-WORD BY 4-BIT, FAST PAGE MODE D e scriptio n The itPD424400-L is a 1,048,576 w ords by 4 bits dynam ic C M O S RAM . The fast page m ode capability realize high speed access and low power consumption.
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uPD424400-L
26-pin
fiPD424400-60L
iPD424400-70L
/IPD424400-80L
PD424400-10L
PP424400-L
1R35-207-2
b427S2S
S-70L
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Untitled
Abstract: No abstract text available
Text: PRELIM INARY DATA S H E E T MOS INTEGRATED CIRCUIT >IEC /J P D 4 2 S 4 2 1 0 ,4 2 4 2 1 0 4 M-BIT DYNAMIC RAM 256 K-WORD BY 16-BIT, HYPER PA GE MODE, B Y T E READ/W RITE MODE Description The /^ D 4 2S 42 1 0,424210 are 262 144 words by 16 bits dynamic CM O S RAMs with optional
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16-BIT,
/PD42S4210
44-pin
40-pin
PD42S4210-70
26-29i8:
O35-0
0016i8
P40LE-400A-2
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Untitled
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT /¿PD78320 A ,(A1 ),(A2) 16/ 8-BIT SINGLE-CHIP MICROCOMPUTER D E S C R IP T IO N The juPD78320(A) is a 16/8-bit single-chip microcomputer that incorporates a high-performance 16-bit CPU. The ¿zPD78320(A) is one of 78K/I11 series.
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PD78320
juPD78320
16/8-bit
16-bit
zPD78320
78K/I11
iPD78322
PD78320
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Untitled
Abstract: No abstract text available
Text: DATA SHEET NEC / MOS INTEGRATED CIRCUIT / ¿¿PD42S 16165L , 4 2 16 16 5 L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, HYPER PAGE MODE EDO , BYTE READ/WRITE MODE D e s c rip tio n The /iP D 42S 16165L, 4216165L are 1,048,576 words by 16 bits CMOS dynam ic RAMs with optional hyper page
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uPD42S16165L
uPD4216165L
16-BIT,
16165L,
4216165L
42S16165L
PD42S16165L,
50-pin
42-pin
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Untitled
Abstract: No abstract text available
Text: DATA SHEET NEC / MOS INTEGRATED CIRCUIT MC-422000LFB72F 3.3 V OPERATION 2 M-WORD BY 72-BIT DYNAMIC RAM MODULE HYPER PAGE MODE EDO D escription The MC-422000LFB72F is a 2,097,152 words by 72 bits dynamic RAM module on which 9 pieces of 16 M DRAM: ,uPD4217805L are assembled.
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MC-422000LFB72F
72-BIT
MC-422000LFB72F
uPD4217805L
168S-50A8
ti427S2S
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car power amplifier stereo dc 12 volts
Abstract: 1081m Nippon capacitors
Text: N E C ELECTRONICS I NC 72 D E | L.M27S2S ODOfl t at 3 |~ "~ j-7 7 -0 5-oq BIPOLAR ANALOG INTEGRATED C IR C U IT / ¿ P C 1 1 9 7 C FM MULTIPLEX STEREO DEMODULATOR SILICON M O NO LITHIC BIPOLAR INTEGRATED CIRCUIT D E S C R IP T IO N T h e fiP C 1 1 9 7 C is a silicon m o n o lith ic integrated c irc u it fo r F M m u ltip le x d e m o d u la to r designed fo r stereo cassette tape
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MS7S25
0000h2t,
PC1197C
fiPC1197C
J22686
10-81M
car power amplifier stereo dc 12 volts
1081m
Nippon capacitors
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PD78224
Abstract: 03FFFH Pd4168 78P224GJ
Text: b4B75E5 D043143 ^ • NECE pPD78224 Family NFH Flprtronir«; Inr jnPD78220/224/P224 8-Bit, K-Series Microcontrollers With Analog Comparators, Real-Time Output Ports August 1993 Description □ Four tim er-controlled PWM channels The juPD78220, /uPD78224, and ,uPD78P224 are mem
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b4B75E5
D043143
uPD78224
jnPD78220/224/P224)
juPD78220
/uPD78224
uPD78P224
/JPD78224
b427525
DD43173
PD78224
03FFFH
Pd4168
78P224GJ
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TRANSISTOR 5101 FG
Abstract: j 13007-2 WM7 SMD transistor marking code MARKING CODE N-CHANNEL MOS FIELD EFFECT TRANSISTOR TRANSISTOR SMD MARKING CODE s01 smd transistor bq SAA 1025 AHL touch 1015G ELAP cm 76
Text: NEC USER’S MANUAL J0.PD75518 4 BIT SINGLE-CHIP MICROCOMPUTER HPD75517 X P D 7 5 5 1 8 |iPD75P518 Document No. IEU-1305E (O. D. No. IEU-743E Date Published January 1995 P Printed in Japan F£C Corporation 1990 •I b427SSS 0D^S3EH 174 ■ Cautions on CM OS D evices
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uPD75518
HPD75517
iPD75P518
IEU-1305E
IEU-743E)
b427SSS
on-154
PD75518
b427525
00R57Q7
TRANSISTOR 5101 FG
j 13007-2
WM7 SMD transistor marking code
MARKING CODE N-CHANNEL MOS FIELD EFFECT TRANSISTOR
TRANSISTOR SMD MARKING CODE s01
smd transistor bq
SAA 1025
AHL touch
1015G
ELAP cm 76
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Untitled
Abstract: No abstract text available
Text: DATA SHEET NEC / MOS INTEGRATED CIRCUIT MC-424000LFC72F 3.3 V OPERATION 4 M-WORD BY 72-BIT DYNAMIC RAM MODULE HYPER PAGE MODE EDO D escrip tio n The MC-424000LFC72F is a 4,194,304 words by 72 bits dynamic RAM module on which 18 pieces of 16 M DRAM: ;iPD4216405L are assembled.
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MC-424000LFC72F
72-BIT
MC-424000LFC72F
iPD4216405L
M168S-50A3
b427SES
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Untitled
Abstract: No abstract text available
Text: Introduction The V r 4100 microprocessor is a low-cost, low-power microprocessor that is compatible with the M IPS I, MIPS II, and MIPS III Instruction Set Architecture ISA , except for the Floating-point operating instructions, LL/LLD instruction and SC/SCD instruction.
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b427525
VR4100
64-bit
32-double-e
Vn410Q
Vr4200
Vr4400
Vr4100
MADD16
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