C1030

Abstract: TDC1010 pji53 deta 1117i tlu 011 3G63 TDC1030 63bo
Contextual Info: TDC1030 First-ln First-O ut M em ory F e a tu r e s 6 4 W ords by 9 Bits Cascadable * G 4 W o rd s B v • 15M H z S t ’ i i l - ' I , S l i i f ' . - O u l R o l e s W i l l r l a ;]3 * 19 M h z E u 'St- n B u r s t - U i t H a te s W i l r u u l M a c s

TRW 1030J6C

Abstract: 1030J6C SO-64 TDC1030B6C TDC1030 TDC1030B6A TDC1030C3A TDC1030C3C
Contextual Info: iiiv r TDC1030 First-In First-Out Memory Features 6 4 W o rd s by 9 Bits C ascadable • 6 4 W o r d s B y 9 B it s O r g a n iz a t io n T h e T R W T D C 1 0 3 0 is a n e x p a n d a b le , F ir st -In F ir s t - O u t F IF O m e m o r y o r g a n iz e d a s 6 4 w o r d s b y 9 bits. A

1030J6C

Abstract: C1030B TDC1030B6C 1030J6A
Contextual Info: m m m T D C 1 0 3 0 M First-In First-Out Memory 64 Words by 9 Bits Cascadable T he T R W T D C 1 0 3 0 is an expandable, First-In First-Out FIFO m em ory organized as 64 w o rd s by 9 bits. A 1 5 M H z data rate m akes it ideal in high-speed ap p li­ cations. Bu rst data rates of 18MFHz can be obtained in

Contextual Info: . New Data File Number CD54/74HC7030 CD54/74HCT7030 2122 HARRIS SEMICOND SECTOR 27E D E3 4302271 0016145 0 Hi H AS T -lC t-S S -M 5 ooT p u t 64-Word x 9-Bit FIFO Register; 3-State Type Features: -Q 0 DATA-OUT “ READY _ DATA-IN READY 92 C S - 4 2 6 6 0 FUNCTIONAL DIAGRAM

74HC7030

Contextual Info: HARRIS Œ SEMI CON D U CT OR CD54/74HC7030 CD54/74HCT7030 June 1998 64-Word x 9-Bit FIFO Register; 3-State Type Features: - 08 DATA-OUT "R E A D Y _ DATA-IN READY MASTER Re s e t 92 CS- 42 66 0 FUNCTIONAL DIAGRAM • Synchronous or asynchronous operation ■ 3-state outputs standard

Contextual Info: New Data File N um ber 2122 CD54/74HC7030 CD54/74HCT7030 64-Word x 9-Bit FIFO Register; 3-State Type Features: 92CS-42860 FUNCTIONAL DIAGRAM • S ynchronou s o r asynchronous o peration ■ 3-state ou tputs standard ■ M a ster-reset in p u ts to clear data

Contextual Info: New Data File Number 2122 CD54/74HC7030 CD54/74HCT7030 64-Word x 9-Bit FIFO Register; 3-State Type Features: 92 CS - -»2860 FUNCTIONAL DIAGRAM • Syn chronous or asynchronous operation • 3-state outputs standard ■ M aster-reset inputs to clear data

register file

Abstract: TRW LSI Products c3220
Contextual Info: Memory/Storage TRiiw Signal processing puts extraordinary demands on memory and storage elements. The high speeds involved call for multi-port memories. Asynchronous system interfaces need high-speed FIFO buffers. The highly pipelined architectures require a variety of short, wide, variable delays to compensate