Untitled
Abstract: No abstract text available
Text: Advance information •■ I l AS4LC2M8S0 AS4LC1M1ÓS0 A 3.3V 2 M x 8 /lM x 16 CMOS synchronous DRAM Features Automatic and direct precharge Burst read, single write Can assert random column address in every cycle LVl'l'L compatible V O 3.3Vpower supply JEDEC standard package, pinout and function
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OCR Scan
|
PDF
|
44-pin
50-pin
44-pin
50-pin
AS4LC1M16S0-8TC
ASHX2M890-10TC
AStLClM1690-10TC
AS4LC2M8S0-12TC
AS4IC1M16S0-12TC
T90PII400
|
Untitled
Abstract: No abstract text available
Text: Advance information •■ I l AS4LC2M8S0 AS4LC1M1ÓS0 A 3.3V 2 M x 8 /lM x 16 CMOS synchronous DRAM Features Automatic and direct precharge Burst read, single write Can assert random column address in every cycle LVl'l'L compatible V O 3.3Vpower supply JEDEC standard package, pinout and function
|
OCR Scan
|
PDF
|
44-pin
50-pin
50-pin
AS4LC1M16S0-8TC
ASHX2M890-10TC
AStLClM1690-10TC
AS4LC2M8S0-12TC
AS4IC1M16S0-12TC
T90PII400
|