LS377
Abstract: T54LS377D2 T74LS377 T74LS377XX
Text: OCTAL D FLIP-FLOP WITH COMMON ENABLE AND CLOCK DESCRIPTION The T54LS377/T74LS377 is an 8-Bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable. The device is packaged in the spacesaving 0.3 inch row spacing 20 pin package.
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T54LS377/T74LS377
T54LS377
T74LS377
LS377
T54LS377D2
T74LS377XX
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LS377
Abstract: T54LS377D2 T74LS377 T74LS377XX
Text: 95. OCTAL D FLIP-FLOP WITH COMMON ENABLE AND CLOCK DESCRIPTION The T54LS377/T74LS377 is an 8-Bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common
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T54LS377/T74LS377
T54LS377
T74LS377
LS377
T54LS377D2
T74LS377XX
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Untitled
Abstract: No abstract text available
Text: s Q S-T H 0n S0N 07E t | T lE 'ia a ? Q D lb 3 3 1 S | LOW POWER SCHOTTKY fTTÜ TO ? INTEGRATED CIRCUITS ft h T74LS377 1 67C 15 4 ó 8 • l' " 1 T-46-07-11 D ’— OCTAL D FLIP-FLOP WITH COMMON ENABLE AND CLOCK DESCRIPTION The T54LS377/T74LS377 is an 8-Bit register built
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T54LS377/T74LS377
T-46-07-11
T74LS377
T54LS
T74LS377
T74LS
74LS377
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T74LS377B1
Abstract: DIODE H5 Z7
Text: rZ 7 SGS-THOMSON A T # tL IO T « S o T 7 4 LS377 OCTAL D FLIP-FLOP WITH COMMON ENABLE AND CLOCK • 8-BIT HIGH SPEED PARALLEL REGISTERS ■ POSITIVE EDGE-TRIGGED D-TYPE FLIPFLOP ■ FULLY BUFFERED COMMON CLOCK AND ENABLE INPUTS ■ INPUT CLAMP DIODES LIMIT HIGH-SPEED
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LS377
T54LS377
T74LS377B1
DIODE H5 Z7
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