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Abstract: No abstract text available
Text: « 01/Iie n /« V LOW-POWER HEX PECL-TO-TTL TRANSLATOR SYNERGY SEMICONDUCTOR FEATURES PRELIMINARY SY100S390 DESCRIPTION The SY100S390 is a hex PECL-to-TTL translator for converting 100K logic levels to TTL logic levels. Unlike other level translators, the SY100S390 operates using only one
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01/Iie
SY100S390
SY100S390
28-pin
T0Q13fil
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Untitled
Abstract: No abstract text available
Text: *SYNERGY D FLIP-FLOP WITH SET AND RESET SY10EL31 SY100EL31 SEMICONDUCTOR DESCRIPTION FEATURES The SY10/100EL31 are D flip -flop s w ith set and reset. T he d e vice s are fu n c tio n a lly e q u iva le n t to th e E131 d e vice s, w ith h ig h e r p e rfo rm a n ce ca p a b ilitie s .
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SY10EL31
SY100EL31
SY10/100EL31
L31ZC
L31ZC
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Abstract: No abstract text available
Text: * SY10422-3/4/5/7 SY100422-3/4/517 SY101422-3/4/5/7 SY101M422-5/7 256 x 4 ECL RAM SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES The Synergy S Y10/100/101422 are 1024-bit Random Access Memories RAMs , designed with advanced Emitter Coupled Logic (ECL) circuitry. The devices are organized
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SY10422-3/4/5/7
SY100422-3/4/5
SY101422-3/4/5/7
SY101M422-5/7
Y10/100/101422
1024-bit
256-words-by-4-bits
10K/100K
SY101422
SY10/100/101422
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Abstract: No abstract text available
Text: « SYNERGY DUAL 8-INPUT MULTIPLEXER SEMICONDUCTOR FEATURES • SY100S363 DESCRIPTION The SY100S363 is ad ua l 8-input m ultiplexer designed fo r use in new, high-perform ance ECL systems. The three Data Select inputs So, S i , S 2 determ ine the bits from each of the inputs (An, Bn) that w ill be passed on
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SY100S363
SY100S363
900ps
SY100S363DC
D24-1
SY100S363FC
F24-1
SY100S363JC
J28-1
T0D13fll
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Untitled
Abstract: No abstract text available
Text: * TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER SYNERGY SY10E457 SY100E457 SEMICONDUCTOR DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ Differential D and Q Vbb output for single-ended use 700ps max. propagation delay High frequency outputs Separate and common select
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SY10E457
SY100E457
700ps
SY10E457
SY100E457
SY10E457JC
J28-1
SY100E457JC
T0D13fll
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