ANSI/EOS ESD S11.11-2001
Abstract: EIA-625 1x10E-8 EIA-541 SSTV16857 SSYA010 abstract for "metal detector" 1x10e9
Text: Application Report SZZA047 - July 2004 Semiconductor Packing Material Electrostatic Discharge ESD Protection Albert Escusa and Lance Wright Standard Linear and Logic ABSTRACT Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI)
|
Original
|
SZZA047
ANSI/EOS ESD S11.11-2001
EIA-625
1x10E-8
EIA-541
SSTV16857
SSYA010
abstract for "metal detector"
1x10e9
|
PDF
|
CD4043BE HARRIS
Abstract: CD4043BE CD4043BEE4 d4043
Text: Data sheet acquired from Harris Semiconductor SCHS041D − Revised October 2003 The CD4043B and CD4044B types are supplied in 16-lead hermetic dual-in-line ceramic packages F3A suffix , 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (D, DR, DT, DW, DWR,
|
Original
|
SCHS041D
CD4043B
CD4044B
16-lead
17-Oct-2005
CD4043BD
CD4043BDE4
CD4043BE HARRIS
CD4043BE
CD4043BEE4
d4043
|
PDF
|
hes 1-221
Abstract: No abstract text available
Text: SN54HC7002, SN74HC7002 QUADRUPLE POSITIVEĆNOR GATES WITH SCHMITTĆTRIGGER INPUTS SCLS033F − MARCH 1984 − REVISED NOVEMBER 2004 D D D D D D D Wide Operating Voltage Range of 2 V to 6 V Typical tpd = 14 ns Low Power Consumption, 20-µA Max ICC Low Input Current of 1 µA Max
|
Original
|
SN54HC7002,
SN74HC7002
SCLS033F
SN54HC7002
SN74HC7002
scyd013
sdyu001x
sgyc003d
SN74HC4851/HC4852
scyb019b
hes 1-221
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCAS289L – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • • • • • • • D, DB, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V
|
Original
|
SN74LVC112A
SCAS289L
000-V
A114-A)
A115-A)
SNS74LVC2G53
scyb014
scyb005
scym001
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN74LVC861A 10-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS309I – MARCH 1993 – REVISED FEBRUARY 2005 FEATURES • • • • • • • • • Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 6.4 ns at 3.3 V Typical VOLP Output Ground Bounce
|
Original
|
SN74LVC861A
10-BIT
SCAS309I
000-V
A114-A)
A115-A)
OEBS74LVC2G53
scyb014
scyb005
|
PDF
|
Untitled
Abstract: No abstract text available
Text: www.ti.com SN74ALVCH162260 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS570I – MARCH 1996 – REVISED AUGUST 2004 FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted
|
Original
|
SN74ALVCH162260
12-BIT
24-BIT
SCAS570I
MIL-STD-883,
|
PDF
|
cd4027b
Abstract: D4013 SB 125 024 CD4027BF3A real time application of D flip-flop
Text: Data sheet acquired from Harris Semiconductor SCHS032C − Revised October 2003 The CD4027B types are supplied in 16-lead hermetic dual-in-line ceramic packages F3A suffix , 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and
|
Original
|
SCHS032C
CD4027B
16-lead
17-Oct-2005
CD4027BE
CD4027BEE4
CD4027BF
D4013
SB 125 024
CD4027BF3A
real time application of D flip-flop
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN74ALS641A, SN74ALS642A, SN74AS641 OCTAL BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS SDAS300 – MARCH 1995 • DW OR N PACKAGE TOP VIEW Bidirectional Bus Transceivers in High-Density 20-Pin Packages Choice of True or Inverting Logic Package Options Include Plastic
|
Original
|
SN74ALS641A,
SN74ALS642A,
SN74AS641
SDAS300
20-Pin
300-mil
SN74ALS642A
scyd013
|
PDF
|
SN-74LS153N
Abstract: SN74LS153N SN74LS153N texas
Text: PACKAGE OPTION ADDENDUM www.ti.com 26-Sep-2005 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) 76011012A ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC 7601101EA
|
Original
|
26-Sep-2005
6011012A
7601101EA
7601101FA
JM38510/07902BEA
JM38510/07902BFA
SN-74LS153N
SN74LS153N
SN74LS153N texas
|
PDF
|
SN74AUC2G125DCUR
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages
|
Original
|
SN74AUC2G125
SCES532A
000-V
A114-A)
A115-A)
SN74AUC2G125DCUR
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN54ABT823, SN74ABT823 9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SCBS158E – JANUARY 1991 – REVISED MAY 1997 D D D D D D SN54ABT823 . . . JT OR W PACKAGE SN74ABT823 . . . DB, DW, OR NT PACKAGE TOP VIEW OE 1D 2D 3D 4D 5D 6D 7D 8D 9D CLR GND These 9-bit flip-flops feature 3-state outputs
|
Original
|
SN54ABT823,
SN74ABT823
SCBS158E
MIL-STD-883,
JESD-17
32-mA
64-mA
sdyu001x
sgyc003d
|
PDF
|
SN74AVC
Abstract: SN74AVC "cross-reference"
Text: SN74AVC16646 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS www.ti.com SCES181F – DECEMBER 1998 – REVISED JUNE 2005 • FEATURES • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process
|
Original
|
SN74AVC16646
16-BIT
SCES181F
SN74AVC
SN74AVC "cross-reference"
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Data sheet acquired from Harris Semiconductor SCHS059C – Revised September 2003 The CD4078B types are supplied in 14-lead hermetic dual-in-line ceramic packages F3A suffix , 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes),
|
Original
|
SCHS059C
CD4078B
14-lead
17-Oct-2005
7704402CA
CD4078BE
CD4078BEE4
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN54ABT16600, SN74ABT16600 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS209B – JUNE 1992 – REVISED JANUARY 1997 D D D D D D D D SN54ABT16600 . . . WD PACKAGE SN74ABT16600 . . . DGG OR DL PACKAGE TOP VIEW Members of the Texas Instruments
|
Original
|
SN54ABT16600,
SN74ABT16600
18-BIT
SCBS209B
MIL-STD-883,
JESD-17
300-mil
|
PDF
|
|
CANBUS-DEMO
Abstract: No abstract text available
Text: SN74AHCT1G126 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT SCLS380I – AUGUST 1997 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 6 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V
|
Original
|
SN74AHCT1G126
SCLS380I
000-V
A114-A)
A115-A)
scla013d
sgyn133
sgyv014c
CANBUS-DEMO
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN74AUP1G125 LOW-POWER SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT www.ti.com SCES595E – JULY 2004 – REVISED JULY 2005 FEATURES • • • • • • • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Low Static-Power Consumption
|
Original
|
SN74AUP1G125
SCES595E
|
PDF
|
OF946
Abstract: No abstract text available
Text: 1CY74FCT16444T/2 H244T Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY74FCT16244T CY74FCT162244T CY74FCT162H244T 16-Bit Buffers/Line Drivers SCCS028B - December 1987 - Revised September 2001
|
Original
|
1CY74FCT16444T/2
H244T
CY74FCT16244T
CY74FCT162244T
CY74FCT162H244T
SCCS028B
16-Bit
OF946
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN74GTLPH1645 16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER www.ti.com FEATURES • • • • • • • • • • • • Member of the Texas Instruments Widebus Family TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes OEC™ Circuitry Improves Signal Integrity and
|
Original
|
SN74GTLPH1645
16-BIT
SCES290D
|
PDF
|
military radar 20 pages documentation
Abstract: No abstract text available
Text: SN74LVTH244AĆEP 3.3ĆV ABT OCTAL BUFFER/DRIVER WITH 3ĆSTATE OUTPUTS SCAS691C − APRIL 2003 − REVISED OCTOBER 2003 D Controlled Baseline D D D D D D D D D Bus Hold on Data Inputs Eliminates the − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of
|
Original
|
SN74LVTH244AEP
SCAS691C
military radar 20 pages documentation
|
PDF
|
SONY msl 9351
Abstract: TSB12LV23 tsb41ab1 g4
Text: TSB41AB1 IEEE 1394aĆ2000 ONEĆPORT CABLE TRANSCEIVER/ARBITER SLLS423I − JUNE 2000 − REVISED MARCH 2005 D Fully Supports Provisions of IEEE D D D D D D D D 1394-1995 Standard for High Performance Serial Bus† and IEEE 1394a-2000 Fully Interoperable With FireWire and
|
Original
|
TSB41AB1
1394a2000
SLLS423I
1394a-2000
sllz012
SONY msl 9351
TSB12LV23
tsb41ab1 g4
|
PDF
|
SN74LS373N
Abstract: sn74ls373p
Text: SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374 OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS SDLS165B – OCTOBER 1975 – REVISED AUGUST 2002 D D D D D D Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package
|
Original
|
SN54LS373,
SN54LS374,
SN54S373,
SN54S374,
SN74LS373,
SN74LS374,
SN74S373,
SN74S374
SDLS165B
SN74LS373N
sn74ls373p
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN74LVCZ240A OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES273H – JUNE 1999 – REVISED APRIL 2005 FEATURES • • • • • • • • • DB, DGV, DW, N, NS, OR PW PACKAGE TOP VIEW Operates From 2.7 V to 3.6 V Inputs Accept Voltages to 5.5 V
|
Original
|
SN74LVCZ240A
SCES273H
000-V
A114-A)
A115-A)
1OG53
scyb014
scyb005
scym001
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN74LVCH16540A 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS569H – MARCH 1996 – REVISED MARCH 2005 FEATURES • • • • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Operates From 1.65 V to 3.6 V
|
Original
|
SN74LVCH16540A
16-BIT
SCAS569H
000-V
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN74ALVCH162374 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES092F – JANUARY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • DGG OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Bus Hold on Data Inputs Eliminates the Need
|
Original
|
SN74ALVCH162374
16-BIT
SCES092F
000-V
A114-A)
A115-A)
|
PDF
|