Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    SY10H350JCTR Search Results

    SY10H350JCTR Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SY10H350JCTR Micrel Semiconductor PECL-to-TTL Translator Original PDF
    SY10H350JCTR Micrel Semiconductor PECL-to-TTL TRANSLATOR Original PDF
    SY10H350JC-TR Microchip Technology Integrated Circuits (ICs) - Logic - Translators, Level Shifters - IC TRNSLTR UNIDIRECTIONAL 20PLCC Original PDF

    SY10H350JCTR Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: PECL-to-TTL TRANSLATOR FEATURES DESCRIPTION The SY10H350 consists of 4 translators with differential inputs and TTL outputs. The 3-state outputs can be disabled by applying a HIGH TTL logic level on the common OE input. The SY10H350 is designed to be used primarily in


    Original     		PDF SY10H350 SY10H350JC J20-1 SY10H350JCTR SY10H350 J20-1)

    10H350

    Abstract: No abstract text available
    Text: PECL-to-TTL TRANSLATOR FEATURES DESCRIPTION The SY10H350 consists of 4 translators with differential inputs and TTL outputs. The 3-state outputs can be disabled by applying a HIGH TTL logic level on the common OE input. The SY10H350 is designed to be used primarily in


    Original     		PDF SY10H350 MC10H350 20-pin SY10H350 SY10H350JC SY10H350JCTR J20-1 10H350

    10H350

    Abstract: j201 Application Note J201 MC10H350 SY10H350 SY10H350JC SY10H350JCTR SY10H350JZ SY10H350JZTR
    Text: Micrel, Inc. PECL-to-TTL TRANSLATOR DESCRIPTION FEATURES • ■ ■ ■ The SY10H350 consists of 4 translators with differential inputs and TTL outputs. The 3-state outputs can be disabled by applying a HIGH TTL logic level on the common OE input. The SY10H350 is designed to be used primarily in


    Original     		PDF SY10H350 SY10H350 M9999-032906 10H350 j201 Application Note J201 MC10H350 SY10H350JC SY10H350JCTR SY10H350JZ SY10H350JZTR

    10H350

    Abstract: J201
    Text: PECL-to-TTL TRANSLATOR FEATURES DESCRIPTION The SY10H350 consists of 4 translators with differential inputs and TTL outputs. The 3-state outputs can be disabled by applying a HIGH TTL logic level on the common OE input. The SY10H350 is designed to be used primarily in


    Original     		PDF SY10H350 SY10H350JC J20-1 SY10H350JCTR SY10H350 J20-1) 10H350 J201