EPM5130
Abstract: D1398
Text: EPM 5130 EPLD High-density, 128-macrocell, general-purpose MAX 5000 EPLD 128 macrocells optimized for pin-intensive applications, easily integrating over 60 TTL MSI and SSI components High-speed multi-LAB architecture tPD as fast as 15 ns Counter frequencies up to 83.3 MHz
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128-macrocell,
32-bit
16-bit
100-pin
84-pin
STS372
D004247
EPM5130
D1398
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EPM5130
Abstract: EPM5130A-20 KSD 101-G EPM5130A-15 100-Pin Package Pin-Out Diagram 4536C
Text: EPM 5130 EPLD Features • ■ ■ ■ ■ ■ ■ ■ ■ High-density, 128-macrocell, general-purpose MAX 5000 EPLD 128 macrocells optimized for pin-intensive applications, easilyintegrating over 60 TTL MSI and SSI components High-speed multi-LAB architecture
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EPM5130
128-macrocell,
32-bit
16-bit
100-pin
84-pin
STS372
EPM5130A-20
KSD 101-G
EPM5130A-15
100-Pin Package Pin-Out Diagram
4536C
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PLMJ7032
Abstract: programming epm7032 EPM7032 EPM7032J epm7032l altera epm7032 32-Macrocell EPM7032-Altera CLASSIC EPLD FAMILY EPM7032LC44-3
Text: ALTERA 47E CORP 0515372 D 0002450 ‘V £ V f <9? AL 201 EPM7032 EPLD High-Performance 32-Macrocell Device May 1992, ver. 1 Prelim inary Inform ation Data Sheet Supplement This data sheet supplem ent should be used together w ith the EPM 7032 EPLD H igh-Perform ance, 32-M acrocell D evice Data Sheet. This supplem ent
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EPM7032
32-Macrocell
10-ns
EPM7032-1
EPM7032-1.
EPM7032-1
PLMJ7032
programming epm7032
EPM7032J
epm7032l
altera epm7032
EPM7032-Altera
CLASSIC EPLD FAMILY
EPM7032LC44-3
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Untitled
Abstract: No abstract text available
Text: F L E X 10K Embedded Programmable Logic Family June 1996, ver. 2 Data Sheet Features. P re lim in a ry In fo rm ation Table 1. FLEX 10K Device Features Feature EPF10K10 EPF10K20 EPF10K30 EPF10K40 EPF10K50 EPF10K70 EPF10K100 Typical gates logic & RAM 10,000
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EPF10K10
EPF10K20
EPF10K30
EPF10K40
EPF10K50
EPF10K70
EPF10K100
208-pin
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EPX880-10
Abstract: altera epx740
Text: FLASHIogic Programmable Logic Device Family Features. • ■ Prelim inary Information ■ ■ ■ Formerly Intel's FLEXlogic iFX family High-performance programmable logic device (PLD) family SRAM-based logic w ith shadow EPROM or FLASH memory elements fabricated on 0.6- and 0.8-micron CMOS technology
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24V10
EPX880
84-Pin
160-Pin
EPX8160
EPX8160
DS1S372
208-Pin
EPX880-10
altera epx740
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EPX880-10
Abstract: No abstract text available
Text: FLASHIogic Programmable Logic Device Family June 1996, ver. 2 Features. Data Sheet • ■ ■ ■ High-performance programmable logic device PLD fam ily SRAM-based logic w ith shadow F L A S H memory elements fabricated on advanced C M O S technology
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24V10
VCC02
VCC03/VCC07
VCC05
EPX88Ã
ggggQo298e5Â
I84-Pin
132-Pin
EPX8160
208-Pin
EPX880-10
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