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    LMK04828BISQE

    Abstract: LMK04828B
    Text: LMK04826B, LMK04828B www.ti.com SNAS605 AP – MARCH 2013 – REVISED JUNE 2013 LMK0482xB Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04826B, LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support


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    PDF LMK04826B, LMK04828B SNAS605 LMK0482xB JESD204B LMK04828BISQE LMK04828B

    ADC16V130CISQ

    Abstract: MABACT0040
    Text: ADC16V130 16-Bit, 130 MSPS A/D Converter with LVDS Outputs General Description The ADC16V130 is a monolithic high performance CMOS analog-to-digital converter capable of converting analog input signals into 16-bit digital words at rates up to 130 Mega Samples Per Second MSPS . This converter uses a differential,


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    PDF ADC16V130 16-Bit, ADC16V130 16-bit ADC16V130CISQ MABACT0040

    varactor 650 manual

    Abstract: No abstract text available
    Text: LMK04906 www.ti.com SNAS589C – NOVEMBER 2011 – REVISED DECEMBER 2012 LMK04906 Ultra Low Noise Clock Jitter Cleaner/Multiplier with 6 Programmable Outputs Check for Samples: LMK04906 FEATURES APPLICATIONS • • • 1 23 • • • • • • • •


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    PDF LMK04906 SNAS589C LMK04906 varactor 650 manual

    Untitled

    Abstract: No abstract text available
    Text: LMK04828B www.ti.com SNAS605 AO – MARCH 2013 – REVISED MARCH 2013 LMK04828 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support • Ultra-Low RMS Jitter and Performance


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    PDF LMK04828B SNAS605 LMK04828 JESD204B

    Untitled

    Abstract: No abstract text available
    Text: LMK04800 www.ti.com SNAS489J – MARCH 2011 – REVISED MARCH 2013 LMK04800 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04800 1 FEATURES 123 • Ultra-Low RMS Jitter Performance – 111 fs RMS Jitter 12 kHz to 20 MHz – 123 fs RMS Jitter (100 Hz to 20 MHz)


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    PDF LMK04800 SNAS489J LMK04800

    LMK04828B

    Abstract: No abstract text available
    Text: LMK04828B www.ti.com SNAS605 AO – MARCH 2013 – REVISED MARCH 2013 LMK04828 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support • Ultra-Low RMS Jitter and Performance


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    PDF LMK04828B SNAS605 LMK04828 JESD204B LMK04828B

    Untitled

    Abstract: No abstract text available
    Text: LMK04826B, LMK04828B www.ti.com SNAS605 AP – MARCH 2013 – REVISED JUNE 2013 LMK0482xB Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04826B, LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support


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    PDF LMK04826B, LMK04828B SNAS605 LMK0482xB JESD204B

    MLT 22 MOSFET AUDIO AMPLIFIER

    Abstract: Hdmi to micro usb wiring diagram LM2687LDX LMS4684LD transistor SMD 12W inverter hdmi CONVERTER SDI IC CAT-5 Sdi IC ADC081S021CISD ds15br400 DP83848k
    Text: DP83848K PHYTER Mini LS Industrial Temperature Single Port 10/100 Ethernet Transceiver General Description Features The DP83848K addresses the quality, reliability and small • Low-power 3.3V, 0.18µm CMOS technology form factor required for space sensitive applications in • Auto-MDIX for 10/100 Mb/s


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    PDF DP83848K 16-Bit, LQA68A) MLT 22 MOSFET AUDIO AMPLIFIER Hdmi to micro usb wiring diagram LM2687LDX LMS4684LD transistor SMD 12W inverter hdmi CONVERTER SDI IC CAT-5 Sdi IC ADC081S021CISD ds15br400

    PS 1025

    Abstract: Power Supply Control IC dap 07 LMK04828B LMK04828
    Text: LMK04828B www.ti.com SNAS605 AO – MARCH 2013 – REVISED MARCH 2013 LMK04828 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support • Ultra-Low RMS Jitter and Performance


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    PDF LMK04828B SNAS605 LMK04828 JESD204B PS 1025 Power Supply Control IC dap 07 LMK04828B

    Untitled

    Abstract: No abstract text available
    Text: ADC16V130 www.ti.com SNAS458E – NOVEMBER 2008 – REVISED MARCH 2013 ADC16V130 16-Bit, 130 MSPS A/D Converter With LVDS Outputs Check for Samples: ADC16V130 FEATURES APPLICATIONS • • • • 1 2 • • • • • • • • Dual Supplies: 1.8V and 3.0V Operation


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    PDF ADC16V130 SNAS458E ADC16V130 16-Bit, 64-pin CDMA2000,

    VXB1-1137-15M360

    Abstract: 38.88 NF 820 OLT block diagram GPON VXB1
    Text: LMK03806 www.ti.com SNAS522H – SEPTEMBER 2011 – REVISED AUGUST 2012 LMK03806 Ultra Low Jitter Clock Generator with 14 Programmable Outputs Check for Samples: LMK03806 FEATURES 1 • 2 • • • • • • • High Performance, Ultra Low Jitter Clock


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    PDF LMK03806 SNAS522H LMK03806 VXB1-1137-15M360 38.88 NF 820 OLT block diagram GPON VXB1

    226 varactor

    Abstract: No abstract text available
    Text: TI Confidential - NDA Restrictions LMK04906 www.ti.com SNAS589B – NOVEMBER 2011 – REVISED DECEMBER 2012 LMK04906 Ultra Low Noise Clock Jitter Cleaner/Multiplier with 6 Programmable Outputs Check for Samples: LMK04906 FEATURES APPLICATIONS • • • 1


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    PDF LMK04906 SNAS589B LMK04906 226 varactor

    SQA64A

    Abstract: JESD204B JESD-20
    Text: LMK04820 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs 1.0 General Description 3.0 Features The LMK04820 family is the industry's highest performance clock conditioner with JEDEC JESD204B support. The dual loop PLLatinum architecture enables sub-100 fs RMS jitter


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    PDF LMK04820 JESD204B sub-100 SQA64A JESD-20

    SNAS605

    Abstract: LMK04828 PS 1025 LMK04828B 0X158
    Text: LMK04828B www.ti.com SNAS605 AO – MARCH 2013 – REVISED MARCH 2013 LMK04828 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04828B 1 INTRODUCTION 1.1 Features 12 • JEDEC JESD204B Support • Ultra-Low RMS Jitter and Performance


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    PDF LMK04828B SNAS605 LMK04828 JESD204B PS 1025 LMK04828B 0X158

    Untitled

    Abstract: No abstract text available
    Text: ADC16V130 www.ti.com SNAS458E – NOVEMBER 2008 – REVISED MARCH 2013 ADC16V130 16-Bit, 130 MSPS A/D Converter With LVDS Outputs Check for Samples: ADC16V130 FEATURES APPLICATIONS • • • • 1 2 • • • • • • • • Dual Supplies: 1.8V and 3.0V Operation


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    PDF ADC16V130 SNAS458E ADC16V130 16-Bit, 64-pin

    DAP 07

    Abstract: JESD22-B111 DAP 08 transistor smd sensor 80L dap 07 smd dap sot 23-5 SPA52A AN-1187 LQB08A MO-220
    Text: National Semiconductor Application Note 1187 August 27, 2010 Table of Contents Introduction . 2 Package Overview . 2


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    PDF AN-1187 DAP 07 JESD22-B111 DAP 08 transistor smd sensor 80L dap 07 smd dap sot 23-5 SPA52A AN-1187 LQB08A MO-220

    vrm circuit testing

    Abstract: VA-30
    Text: ADC16V130 ADC16V130 16-Bit, 130 MSPS A/D Converter with LVDS Outputs Literature Number: SNAS458D ADC16V130 16-Bit, 130 MSPS A/D Converter with LVDS Outputs General Description The ADC16V130 is a monolithic high performance CMOS analog-to-digital converter capable of converting analog input


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    PDF ADC16V130 ADC16V130 16-Bit, SNAS458D 16-bit vrm circuit testing VA-30

    Untitled

    Abstract: No abstract text available
    Text: ADC16V130 16-Bit, 130 MSPS A/D Converter with LVDS Outputs General Description The ADC16V130 is a monolithic high performance CMOS analog-to-digital converter capable of converting analog input signals into 16-bit digital words at rates up to 130 Mega Samples Per Second MSPS . This converter uses a differential,


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    PDF ADC16V130 16-Bit, 16-bit

    Untitled

    Abstract: No abstract text available
    Text: LMK04820 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs 1.0 General Description 3.0 Features The LMK04820 family is the industry's highest performance clock conditioner with JEDEC JESD204B support. The dual loop PLLatinum architecture enables sub-100 fs RMS jitter


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    PDF LMK04820 JESD204B sub-100

    solid state 220 volt stabilizer circuit

    Abstract: national semiconductor MDAC VDR RESISTOR MABACT0040 ADC16V130CISQ single phase automatic stabilizer using transformer
    Text: ADC16V130 16-Bit, 130 MSPS A/D Converter with LVDS Outputs General Description The ADC16V130 is a monolithic high performance CMOS analog-to-digital converter capable of converting analog input signals into 16-bit digital words at rates up to 130 Mega Samples Per Second MSPS . This converter uses a differential,


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    PDF ADC16V130 16-Bit, ADC16V130 16-bit solid state 220 volt stabilizer circuit national semiconductor MDAC VDR RESISTOR MABACT0040 ADC16V130CISQ single phase automatic stabilizer using transformer

    LMK04800

    Abstract: LMK0480X
    Text: LMK04800 www.ti.com SNAS489J – MARCH 2011 – REVISED MARCH 2013 LMK04800 Family Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04800 1 FEATURES 123 • Ultra-Low RMS Jitter Performance – 111 fs RMS Jitter 12 kHz to 20 MHz – 123 fs RMS Jitter (100 Hz to 20 MHz)


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    PDF LMK04800 SNAS489J LMK04800 LMK0480X

    Untitled

    Abstract: No abstract text available
    Text: LMK04816 www.ti.com SNAS597B – JULY 2012 – REVISED APRIL 2013 LMK04816 Three Input Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04816 1 Introduction 1.1 FEATURES 123 • Ultra-Low RMS Jitter Performance – 100 fs RMS Jitter 12 kHz to 20 MHz


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    PDF LMK04816 SNAS597B LMK04816

    CVHD-950-122

    Abstract: K0490
    Text: LMK04906 www.ti.com SNAS589D – JUNE 2012 – REVISED MAY 2013 LMK04906 Ultra Low Noise Clock Jitter Cleaner/Multiplier with 6 Programmable Outputs Check for Samples: LMK04906 FEATURES APPLICATIONS • • • 1 23 • • • • • • • • • •


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    PDF LMK04906 SNAS589D LMK04906 CVHD-950-122 K0490

    Untitled

    Abstract: No abstract text available
    Text: LMK04816 www.ti.com SNAS597A – JULY 2012 – REVISED AUGUST 2012 LMK04816 Three Input Low-Noise Clock Jitter Cleaner with Dual Loop PLLs Check for Samples: LMK04816 FEATURES 1 • Ultra-Low RMS Jitter Performance – 100 fs RMS jitter 12 kHz to 20 MHz


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    PDF LMK04816 SNAS597A LMK04816