JTAG MODULE SPI
Abstract: spi flash parallel port TSOP 28 SPI memory Package flash 88P8341
Text: SPI EXCHANGE SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors
|
Original
|
PDF
|
BH820-1)
88P8341
drw38
JTAG MODULE SPI
spi flash parallel port
TSOP 28 SPI memory Package flash
88P8341
|
IDT88P8344
Abstract: 88P8344
Text: SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors
|
Original
|
PDF
|
BH820-1)
88P8344
IDT88P8344
88P8344
|
TSX 07 software
Abstract: DPRAM Quad SPI MPC860 ORSPI4-2FE1036C SPI-324P-O4-N1 OIF-SPI4-02
Text: Quad SPI-3 to SPI-4 PHY Layer Bridge Core April 2004 IP Data Sheet Features – Configurable through the MicroProcessor Interface MPI ORCA 4 System Bus – Programmable parity type on SPI-3 bus • Complete Quad SPI-3 to SPI-4 PHY Layer Bridge Solution Based on the ORCA
|
Original
|
PDF
|
OIF-SPI3-01
ORSPI4-2FE1036C
SPI-324P-O4-N1.
TSX 07 software
DPRAM
Quad SPI
MPC860
SPI-324P-O4-N1
OIF-SPI4-02
|
TSOP 48 thermal resistance type1
Abstract: IDT88P8342 drw22
Text: SPI EXCHANGE 2 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors
|
Original
|
PDF
|
BH820-1)
88P8342
TSOP 48 thermal resistance type1
IDT88P8342
drw22
|
Untitled
Abstract: No abstract text available
Text: PRODUCT BRIEF IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation
|
Original
|
PDF
|
IDT88P8341
800MHz
BH820-1)
88P8341
|
spi FIFO
Abstract: IDT88P8344 DSC-6370
Text: PRODUCT BRIEF IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation
|
Original
|
PDF
|
IDT88P8344
800MHz
BH820-1)
88P8344
spi FIFO
IDT88P8344
DSC-6370
|
spi on parallel port
Abstract: IDT88P8342
Text: PRODUCT BRIEF IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation
|
Original
|
PDF
|
IDT88P8342
800MHz
BH820-1)
88P8342
6370a
spi on parallel port
IDT88P8342
|
Untitled
Abstract: No abstract text available
Text: ispLever CORE TM Quad SPI-3 to SPI-4 Link Layer Bridge Core User’s Guide October 2005 ipug29_02.0 Quad SPI-3 to SPI-4 Link Layer Bridge Core User’s Guide Lattice Semiconductor Introduction Lattice’s Quad SPI-3 System Packet Interface Level 3 to SPI-4 (System Packet Interface Level 4) Bridge is an IP
|
Original
|
PDF
|
ipug29
BS-2FE1036C.
SPI-324L-O4-N1.
|
lps 256
Abstract: No abstract text available
Text: PRODUCT BRIEF IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4 To request the full IDT88P8341 datasheet, please contact your local IDT Sales Representative or call 1-800-345-7015, you may also email SPI@idt.com FEATURES • • • Functionality - Low speed to high speed SPI exchange device
|
Original
|
PDF
|
IDT88P8341
IDT88P8341
BH820-1)
88P8341
drw38
lps 256
|
0123F POWER SUPPLY
Abstract: 0880E 0830B mcu 08300 0080D 0847f fcbg AA23 AC25 IDT7172604
Text: IDT88K8483 SPI-4 Exchange Document Issue 1.0 Description Features Functionality – Multiplexes logical ports LPs from SPI-4A and SPI-4B to SPI4M – Optionally converts between interleaved packet transfers and whole packet transfers per logical port – Data redirection per LP between SPI-4A, SPI-4B and 10G
|
Original
|
PDF
|
IDT88K8483
IDT88K8483BRI
IDT88K8483
IDT88K8483BLI
IDT88K8484
0123F POWER SUPPLY
0880E
0830B
mcu 08300
0080D
0847f
fcbg
AA23
AC25
IDT7172604
|
NII51011-7
Abstract: No abstract text available
Text: 9. SPI Core NII51011-7.1.0 Core Overview SPI is an industry-standard serial protocol commonly used in embedded systems to connect microprocessors to a variety of off-chip sensor, conversion, memory, and control devices. The SPI core with Avalon interface implements the SPI protocol and provides an Avalon MemoryMapped Avalon-MM interface on the back end.
|
Original
|
PDF
|
NII51011-7
24-bit
|
Untitled
Abstract: No abstract text available
Text: PRODUCT BRIEF IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4 To request the full IDT88P8344 datasheet, please contact your local IDT Sales Representative or call 1-800-345-7015, you may also email SPI@idt.com FEATURES • • • Functionality - Low speed to high speed SPI exchange device
|
Original
|
PDF
|
IDT88P8344
IDT88P8344
800MHz
BH820-1)
88P8344
|
Untitled
Abstract: No abstract text available
Text: PRODUCT BRIEF IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4 To request the full IDT88P8342 datasheet, please contact your local IDT Sales Representative or call 1-800-345-7015, you may also email SPI@idt.com FEATURES • • • Functionality - Low speed to high speed SPI exchange device
|
Original
|
PDF
|
IDT88P8342
IDT88P8342
800MHz
BH820-1)
88P8342
|
sck 082
Abstract: AN802 APP802 MAX5154 MAX7651 MAX7652 CAN protocol basics mosi CS 8-02
Text: Maxim > App Notes > A/D and D/A CONVERSION/SAMPLING CIRCUITS INTERFACE CIRCUITS Keywords: SPI, SPI interface, SCK, MOSI, MISO, CS, I/O ports, bit banging, SPI peripheral. Sep 17, 2001 APPLICATION NOTE 802 Interfacing SPI Peripherals to the MAX7651 Processor
|
Original
|
PDF
|
MAX7651
MAX7651,
12-bit
125KHz)
MAX7651
12MHz
com/an802
MAX5154:
MAX7651:
sck 082
AN802
APP802
MAX5154
MAX7652
CAN protocol basics
mosi
CS 8-02
|
|
|
graphic lcd module 320x240
Abstract: graphic lcd 320x240 module programming kent display 320X240 MSP430F1611 Kent Displays SPI14 monochromatic lcd Cholesteric Liquid Crystal JTAG MODULE SPI
Text: 320x240x5.7 SPI 1/4 VGA 320 x 240 Cholesteric Display Development Kit with SPI Compatible Interface Development Kit Product Description The 320x240 SPI Development Kit contains everything required to quickly evaluate the features and capabilities of the 320x240 SPI Cholesteric LCD
|
Original
|
PDF
|
320x240
25090a
graphic lcd module 320x240
graphic lcd 320x240 module programming
kent display
MSP430F1611
Kent Displays
SPI14
monochromatic lcd
Cholesteric Liquid Crystal
JTAG MODULE SPI
|
LatticeMico32
Abstract: No abstract text available
Text: LatticeMico SPI The LatticeMico serial peripheral interface SPI provides an industrystandard interface between a LatticeMico32 processor and off-chip peripherals, as shown in Figure 1. In master mode, the SPI can be configured to control communication with up to 32 off-chip SPI ports. In slave mode, the
|
Original
|
PDF
|
LatticeMico32
|
RTC Real Time Clocks
Abstract: Real Time Clocks DS1306 RTC DS1306
Text: Application Note 502 Interfacing SPI Real Time Clocks With A Microcontroller www.dalsemi.com Dallas Semiconductor offers a variety of serial Real Time Clocks RTCs . A number of these use the Motorola SPI interface to communicate with a microprocessor. This application note is intended to help customers understand the basics of the SPI interface.
|
Original
|
PDF
|
DS1306.
DS1306,
1306C
RTC Real Time Clocks
Real Time Clocks
DS1306
RTC DS1306
|
TN-200
Abstract: Rabbit 3000 M68HC11 TN200
Text: TN200 SPI Using the Rabbit Clocked Serial Ports The Serial Peripheral Interface SPI is a four-wire full-duplex synchronous serial data link that is implemented in many microcontrollers and peripheral devices. The SPI was originally developed by Motorola to
|
Original
|
PDF
|
TN200
M68HC11
TN-200
Rabbit 3000
TN200
|
MON08 schematic
Abstract: SPIGen SPIGen for parallel port MC68HC908JW32 MON08 spi to usb usb spi converter spi on parallel port USB to parallel
Text: Analog and Mixed-Signal Fact Sheet USB to SPI Interface Board Featuring the MC68HC908JW32 Overview Communications through the USB port USB to SPI Interface Block Diagram have become a standard feature on almost every new personal computer. The USB to SPI interface evaluation boards are
|
Original
|
PDF
|
MC68HC908JW32
MON08
MC68HC908JW32.
MC68HC908JW32
MON08 schematic
SPIGen
SPIGen for parallel port
MON08
spi to usb
usb spi converter
spi on parallel port
USB to parallel
|
TXC-06880
Abstract: TranSwitch txc-06880 ethernet chip switch GMII switch
Text: Envoy -CE2 Envoy™-CE4 SPI-3 to Ethernet Converters Product Brief Going from SPI-3 to Ethernet is uncomplicated and cost-effective TranSwitch’s Envoy-CE2 and Envoy-CE4 provide multiple Ethernet interfaces to a SPI-3 for connecting to a network processing unit, or
|
Original
|
PDF
|
|
V2170
Abstract: 4E3C crystal 24mhz
Text: XR20V2170 I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER JUNE 2011 REV. 1.0.1 GENERAL DESCRIPTION FEATURES • Selectable I2C/SPI Interface • SPI clock frequency up to 18 MHz • Meets true EIA/TIA-232-F Standards from +2.97V The XR20V21701 V2170 is a high performance
|
Original
|
PDF
|
XR20V2170
64-BYTE
RS232
XR20V21701
V2170)
V2170
4E3C
crystal 24mhz
|
wishbone
Abstract: spi flash controller
Text: LatticeMico SPI Flash Controller The LatticeMico Serial Peripheral Interface SPI flash controller is a WISHBONE slave device that provides an industry-standard interface between a central processing unit (CPU) and an off-chip SPI flash memory device. The controller has two separate WISHBONE slave ports: Port S and
|
Original
|
PDF
|
|
74ls139 decoder pin configuration
Abstract: SP74HCT139N 74LS139 SP74HCT139J 74LS139 pin configuration with
Text: SPI SP74HCT139 DECODER/DEMULTIPLEXER FEATURES • Designed for high performance memory decoders in microprocessor systems ■ Two independent 2 to 4 line Decoders/ Demultiplexers with inverted outputs ■ Pin com patible with 74LS139 ■ SPI CMOS technology
|
OCR Scan
|
PDF
|
SP74HCT139
74LS139
SP74HCT139
74LS139.
20/iA
74ls139 decoder pin configuration
SP74HCT139N
74LS139
SP74HCT139J
74LS139 pin configuration with
|
74LS239
Abstract: SP74SC139F SP74SC139N
Text: SPI SP74SC239 DECODER/DEMULTIPLEXER PIN CONFIGURATION FEATURES • Designed for high performance decoders in microprocessor systems ■ Two independent 2 to 4 line Decoders/ Demultiplexers with non-inverted outputs ■ Pin com patible with 74LS239 ■ SPI CM O S technology
|
OCR Scan
|
PDF
|
SP74SC239
74LS239
SP74SC239
74LS239.
74LS239
SP74SC139F
SP74SC139N
|
