SN54LV161A Search Results

SN54LV161A Datasheets (5)

Part	Manufacturer	Description	Datasheet Type	PDF
SN54LV161A	Texas Instruments	4-BIT SYNCHRONOUS BINARY CONTERS	Original	PDF
SN54LV161A	Texas Instruments	4-BIT SYNCHRONOUS BINARY COUNTERS	Original	PDF
SN54LV161AFK	Texas Instruments	4-BIT SYNCHRONOUS BINARY COUNTER	Original	PDF
SN54LV161AJ	Texas Instruments	4-BIT SYNCHRONOUS BINARY COUNTER	Original	PDF
SN54LV161AW	Texas Instruments	4-BIT SYNCHRONOUS BINARY COUNTER	Original	PDF

SN54LV161A Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
SN74LV161 Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4	Original	SN54LV161A, SN74LV161A SCLS404F SN54LV161A SN74LV161A 000-V SN74LV161	PDF
Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404C – APRIL 1998 – REVISED JULY 2003 D D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC RCO QA QB QC QD ENT LOAD SN54LV161A . . . FK PACKAGE TOP VIEW A B NC	Original	SN54LV161A, SN74LV161A SCLS404C 000-V A114-A) A115-A) SN54LV161A	PDF
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4	Original	SN54LV161A, SN74LV161A SCLS404F SN54LV161A SN74LV161A 000-V	PDF
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4	Original	SN54LV161A, SN74LV161A SCLS404F SN54LV161A SN74LV161A 000-V	PDF
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4	Original	SN54LV161A, SN74LV161A SCLS404F SN54LV161A SN74LV161A 000-V	PDF
SN74LV161 Abstract: A115-A C101 SN54LV161A SN74LV161A Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404D − APRIL 1998 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4	Original	SN54LV161A, SN74LV161A SCLS404D SN54LV161A LV161A SN74LV161 A115-A C101 SN54LV161A SN74LV161A	PDF
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4	Original	SN54LV161A, SN74LV161A SCLS404F SN54LV161A LV161A	PDF
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4	Original	SN54LV161A, SN74LV161A SCLS404F SN54LV161A SN74LV161A 000-V	PDF
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4	Original	SN54LV161A, SN74LV161A SCLS404F SN54LV161A SN74LV161A 000-V	PDF
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404E − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4 13	Original	SN54LV161A, SN74LV161A SCLS404E SN54LV161A SN74LV161A 000-V	PDF
dallas 8820 Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404B – APRIL 1998 – REVISED DECEMBER 2000 D D D D D D D D description SN54LV161A . . . J OR W PACKAGE SN74LV161A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW CLR CLK A B C D ENP GND 1 16 2	Original	SN54LV161A, SN74LV161A SCLS404B 000-V A114-A) A115-A) SN54LV161A SN74LV16U SN74LV161ANSR dallas 8820	PDF
A115-A Abstract: C101 SN54LV161A SN74LV161A Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4	Original	SN54LV161A, SN74LV161A SCLS404F SN54LV161A LV161A A115-A C101 SN54LV161A SN74LV161A	PDF
A115-A Abstract: C101 SN54LV161A SN74LV161A Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404B – APRIL 1998 – REVISED DECEMBER 2000 D D D D D D D D description SN54LV161A . . . J OR W PACKAGE SN74LV161A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW CLR CLK A B C D ENP GND 1 16 2	Original	SN54LV161A, SN74LV161A SCLS404B SN54LV161A LV161A A115-A C101 SN54LV161A SN74LV161A	PDF
Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404B – APRIL 1998 – REVISED DECEMBER 2000 D D D D D D D D description SN54LV161A . . . J OR W PACKAGE SN74LV161A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW CLR CLK A B C D ENP GND 1 16 2	Original	SN54LV161A, SN74LV161A SCLS404B SN54LV161A LV161A	PDF

Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 SN54LV161A . . . J OR W PACKAGE SN74LV161A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP (Output Ground Bounce)	Original	SN54LV161A, SN74LV161A SCLS404F SN54LV161A LV161A	PDF
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404E − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4 13	Original	SN54LV161A, SN74LV161A SCLS404E SN54LV161A LV161A	PDF
Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS S C L S 4 0 4 -A P R IL 1998 EPIC Enhanced-Performance Implanted CMOS Process • Typical V q lp (Output Ground Bounce) < 0.8 V at VCc, Ta = 25°C SN54LV161A . . . J OR W PACKAGE SN74LV161A . . . D, DB, DGV, NS, OR PW PACKAGE	OCR Scan	SN54LV161A, SN74LV161A SN54LV161A SN74LV161A	PDF
A115-A Abstract: C101 SN54LV161A SN74LV161A 74LV161A Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404B – APRIL 1998 – REVISED DECEMBER 2000 D D D D D D D D description SN54LV161A . . . J OR W PACKAGE SN74LV161A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW CLR CLK A B C D ENP GND 1 16 2	Original	SN54LV161A, SN74LV161A SCLS404B SN54LV161A LV161A A115-A C101 SN54LV161A SN74LV161A 74LV161A	PDF
Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404 – APRIL 1998 description The ’LV161A devices are 4-bit synchronous binary counters designed for 2-V to 5.5-V VCC operation. These synchronous, presettable counters feature an internal carry look-ahead for application in	Original	SN54LV161A, SN74LV161A SCLS404 SN54LV161A SN74LV161A	PDF
Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4	Original	SN54LV161A, SN74LV161A SCLS404F SN54LV161A LV161A	PDF
A115-A Abstract: C101 SN54LV161A SN74LV161A Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4	Original	SN54LV161A, SN74LV161A SCLS404F SN54LV161A LV161A A115-A C101 SN54LV161A SN74LV161A	PDF
CTRDIV16 Abstract: SN54LV161A SN74LV161A Contextual Info: SN54LV161A, SN74LV161A 4-BIT SYNCHRONOUS BINARY COUNTERS SCLS404A – APRIL 1998 – REVISED MAY 2000 D D D D D D D description CLR CLK A B C D ENP GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC RCO QA QB QC QD ENT LOAD SN54LV161A . . . FK PACKAGE TOP VIEW	Original	SN54LV161A, SN74LV161A SCLS404A SN54LV161A LV161A CTRDIV16 SN54LV161A SN74LV161A	PDF
74LV161A Abstract: A115-A C101 SN54LV161A SN74LV161A Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404D − APRIL 1998 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4	Original	SN54LV161A, SN74LV161A SCLS404D SN54LV161A LV161A 74LV161A A115-A C101 SN54LV161A SN74LV161A	PDF
A115-A Abstract: C101 SN54LV161A SN74LV161A Contextual Info: SN54LV161A, SN74LV161A 4ĆBIT SYNCHRONOUS BINARY COUNTERS SCLS404F − APRIL 1998 − REVISED DECEMBER 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D D D D CLR CLK A B C D ENP GND 1 16 2 15 3 14 4	Original	SN54LV161A, SN74LV161A SCLS404F SN54LV161A LV161A A115-A C101 SN54LV161A SN74LV161A	PDF

SN54LV161A Search Results

SN54LV161A Datasheets (5)

SN54LV161A Datasheets Context Search

SN74LV161

SN74LV161

dallas 8820

A115-A

A115-A

A115-A

A115-A

CTRDIV16

74LV161A

A115-A

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