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    SN54AC10 Search Results

    SN54AC10 Datasheets (9)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SN54AC10 Texas Instruments OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS Original PDF
    SN54AC10 Texas Instruments TRIPLE 3-INPUT POSITIVE-NAND GATES Original PDF
    SN54AC10 Texas Instruments TRIPLE 3-INPUT POSITIVE-NAND GATES Original PDF
    SN54AC10FK Texas Instruments SN54AC10 - IC AC SERIES, TRIPLE 3-INPUT NAND GATE, CQCC20, CERAMIC, LCC-20, Gate Original PDF
    SN54AC10FK Texas Instruments TRIPLE 3-INPUT POSITIVE-NAND GATE Original PDF
    SN54AC10J Texas Instruments SN54AC10 - IC AC SERIES, TRIPLE 3-INPUT NAND GATE, CDIP14, CERAMIC, DIP-14, Gate Original PDF
    SN54AC10J Texas Instruments TRIPLE 3-INPUT POSITIVE-NAND GATE Original PDF
    SN54AC10W Texas Instruments SN54AC10 - IC AC SERIES, TRIPLE 3-INPUT NAND GATE, CDFP14, CERAMIC, FP-14, Gate Original PDF
    SN54AC10W Texas Instruments TRIPLE 3-INPUT POSITIVE-NAND GATE Original PDF

    SN54AC10 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS529C – AUGUST 1995 – REVISED SEPTEMBER 2002 D D D 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529C SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS529C – AUGUST 1995 – REVISED SEPTEMBER 2002 D D D 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529C SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR PDF

    SN54AC10

    Abstract: SN74AC10 SN74AC10D SN74AC10DBR SN74AC10DR SN74AC10N SN74AC10NSR SN74AC10PW SN74AC10PWR
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 MS-004 SN54AC10 SN74AC10 SN74AC10D SN74AC10DBR SN74AC10DR SN74AC10N SN74AC10NSR SN74AC10PW SN74AC10PWR PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR PDF

    SN54AC10

    Abstract: SN74AC10 SN74AC10D SN74AC10DBR SN74AC10DR SN74AC10N SN74AC10NSR SN74AC10PW SN74AC10PWR
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 SN54AC10 SN74AC10 SN74AC10D SN74AC10DBR SN74AC10DR SN74AC10N SN74AC10NSR SN74AC10PW SN74AC10PWR PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS529B – AUGUST 1995 – REVISED SEPTEMBER 1996 D D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)


    Original
    SN54AC10, SN74AC10 SCAS529B SN54AC10 SN74AC10 SN54AC10 SN74AC10D SDYA010 SDYA012 SCLA008 PDF

    SN54AC10

    Abstract: SN74AC10 SN74AC10D SN74AC10DBR SN74AC10DR SN74AC10N SN74AC10NSR SN74AC10PW SN74AC10PWR
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 SN54AC10 SN74AC10 SN74AC10D SN74AC10DBR SN74AC10DR SN74AC10N SN74AC10NSR SN74AC10PW SN74AC10PWR PDF

    AC10

    Abstract: SN54AC10 SN74AC10
    Text: SN54AC10, SN74AC10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS529B – AUGUST 1995 – REVISED SEPTEMBER 1996 D D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)


    Original
    SN54AC10, SN74AC10 SCAS529B SN54AC10 AC10 SN54AC10 SN74AC10 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR PDF

    SN54AC10

    Abstract: SN74AC10 SN74AC10D SN74AC10DBR SN74AC10DR SN74AC10N SN74AC10NSR SN74AC10PW SN74AC10PWR
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 SN54AC10 SN74AC10 SN74AC10D SN74AC10DBR SN74AC10DR SN74AC10N SN74AC10NSR SN74AC10PW SN74AC10PWR PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS529B – AUGUST 1995 – REVISED SEPTEMBER 1996 D D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)


    Original
    SN54AC10, SN74AC10 SCAS529B SN54AC10 SN74AC10 SN54AC10 SN74AC10D SN74AC10DBLE SN74AC10DBR PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 independe1995 4040064/F MO-153 PDF

    SN54AC10

    Abstract: SN74AC10 SN74AC10D SN74AC10DBR SN74AC10DR SN74AC10N SN74AC10NSR SN74AC10PW SN74AC10PWR
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 SN54AC10 SN74AC10 SN74AC10D SN74AC10DBR SN74AC10DR SN74AC10N SN74AC10NSR SN74AC10PW SN74AC10PWR PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original
    SN54AC10, SN74AC10 SCAS529D SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCASS28B - AUGUST 1995 - REVISED SEPTEMBER 1996 EPIC Enhanced-Performance Implanted CMOS 1-pin Process Package Options Include Plastic Small-Outllne (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)


    OCR Scan
    SN54AC10, SN74AC10 SCASS28B SN54AC10. SN74AC10 PDF