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    SLLS526C

    Abstract: No abstract text available
    Text: SN65LV1021/SN65LV1212† 10 MHz TO 40 MHz, 10:1 LVDS SERIALIZER/DESERIALIZER SLLS526C – FEBRUARY 2002 – REVISED MAY 2002 D D D D 100–400 Mbps Serial LVDS Data Payload Bandwidth at 10 MHz to 40 MHz System Clock Pin-Compatible Superset of NSM DS92LV1021/DS92LV1212


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    SN65LV1021/SN65LV1212 SLLS526C DS92LV1021/DS92LV1212 SN65LV1021 28-Pin SN65LV1212 SLLS526C PDF