Theta-JC
Abstract: No abstract text available
Text: TFP401, TFP401A TI PanelBus DIGITAL RECEIVER SLDS120B - MARCH 2000 − REVISED JUNE 2003 D Supports UXGA Resolution D D D D D D Reduced Power Consumption − 1.8 V Core Output Pixel Rates Up to 165 MHz Digital Visual Interface (DVI) Specification Compliant1
|
Original
|
TFP401,
TFP401A
SLDS120B
Theta-JC
|
PDF
|
5 inch LCD panel
Abstract: No abstract text available
Text: TFP401, TFP401A TI PanelBus DIGITAL RECEIVER SLDS120B - MARCH 2000 − REVISED JUNE 2003 D Supports UXGA Resolution D D D D D D Reduced Power Consumption − 1.8 V Core Output Pixel Rates Up to 165 MHz Digital Visual Interface (DVI) Specification Compliant1
|
Original
|
TFP401,
TFP401A
SLDS120B
5 inch LCD panel
|
PDF
|
circuit diagram of stag 300
Abstract: No abstract text available
Text: TFP401, TFP401A TI PanelBus DIGITAL RECEIVER SLDS120B - MARCH 2000 – REVISED JUNE 2003 D D D D D D D Supports UXGA Resolution Output Pixel Rates Up to 165 MHz Digital Visual Interface (DVI) Specification Compliant1 True-Color, 24 Bit/Pixel, 16.7M Colors at
|
Original
|
TFP401,
TFP401A
SLDS120B
circuit diagram of stag 300
|
PDF
|
TFP401
Abstract: SLMA002 TFP101 TFP201 TFP403 TFPX01 if8de scdt
Text: TFPx01, 403 Errata SLLZ036 - October 2003 Errata to TFP101 A , TFP201(A), TFP401(A), TFP403, Datasheet Literature Numbers SLDS116A, SLDS119C, SLDS120B, SLDS125A Revision History Revision 1.0 – o Packaging information Revision 1.1 – o Packaging information update from Revision 1.0
|
Original
|
TFPx01,
SLLZ036
TFP101
TFP201
TFP401
TFP403,
SLDS116A,
SLDS119C,
SLDS120B,
SLDS125A
SLMA002
TFP403
TFPX01
if8de
scdt
|
PDF
|
TFP401
Abstract: No abstract text available
Text: TFP401, TFP401A TI PanelBus DIGITAL RECEIVER SLDS120B - MARCH 2000 − REVISED JUNE 2003 D Supports UXGA Resolution D D D D D D Reduced Power Consumption − 1.8 V Core Output Pixel Rates Up to 165 MHz Digital Visual Interface (DVI) Specification Compliant1
|
Original
|
TFP401,
TFP401A
SLDS120B
TFP401
|
PDF
|
circuit diagram of stag 300
Abstract: No abstract text available
Text: TFP401, TFP401A TI PanelBus DIGITAL RECEIVER SLDS120B - MARCH 2000 – REVISED JUNE 2003 D D D D D D D Supports UXGA Resolution Output Pixel Rates Up to 165 MHz Digital Visual Interface (DVI) Specification Compliant1 True-Color, 24 Bit/Pixel, 16.7M Colors at
|
Original
|
TFP401,
TFP401A
SLDS120B
P101/A,
P201/A,
P401/A,
sllz031
P101/201/401
slla137
circuit diagram of stag 300
|
PDF
|
TFP401
Abstract: 100-PIN TFP401A TFP401APZP TFP401PZP 401A
Text: TFP401, TFP401A TI PanelBus DIGITAL RECEIVER SLDS120B - MARCH 2000 − REVISED JUNE 2003 D Supports UXGA Resolution D D D D D D Reduced Power Consumption − 1.8 V Core Output Pixel Rates Up to 165 MHz Digital Visual Interface (DVI) Specification Compliant1
|
Original
|
TFP401,
TFP401A
SLDS120B
TFP401A
TFP401
100-PIN
TFP401APZP
TFP401PZP
401A
|
PDF
|
S-PQFP-G100 Package footprint
Abstract: TFP401 S-PQFP-G100 Package powerPAD layout 0.18-um CMOS technology characteristics 100-PIN TFP401A TFP401APZP TFP401PZP TFT LCD display Human Machine Interface schematic circuit diagram of stag 300
Text: TFP401, TFP401A TI PanelBus DIGITAL RECEIVER SLDS120B - MARCH 2000 – REVISED JUNE 2003 D D D D D D D Supports UXGA Resolution Output Pixel Rates Up to 165 MHz Digital Visual Interface (DVI) Specification Compliant1 True-Color, 24 Bit/Pixel, 16.7M Colors at
|
Original
|
TFP401,
TFP401A
SLDS120B
TFP401A
S-PQFP-G100 Package footprint
TFP401
S-PQFP-G100 Package powerPAD layout
0.18-um CMOS technology characteristics
100-PIN
TFP401APZP
TFP401PZP
TFT LCD display Human Machine Interface schematic
circuit diagram of stag 300
|
PDF
|
Untitled
Abstract: No abstract text available
Text: TFP401, TFP401A TI PanelBus DIGITAL RECEIVER SLDS120B - MARCH 2000 − REVISED JUNE 2003 D Supports UXGA Resolution D D D D D D Reduced Power Consumption − 1.8 V Core Output Pixel Rates Up to 165 MHz Digital Visual Interface (DVI) Specification Compliant1
|
Original
|
TFP401,
TFP401A
SLDS120B
|
PDF
|