Si570
Abstract: Si571 reg137 Si598 Si570 an334 155.520000 Si599 AN104 AN141 AN198
Text: AN334 Si57 X /598/599 ANSI C R E F E R E N CE D E S I G N WI T H O P T I O N A L N O N - VO L A T I L E O UT P UT F R E Q UE N C Y 1. Introduction Because each Si570/Si571/Si598/Si599 programmable XO/VCXO has a unique crystal frequency, it is necessary to perform the frequency conversion calculations for every new desired output frequency for each programmable
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AN334
Si570/Si571/Si598/Si599
Si570
Si571
reg137
Si598
Si570 an334
155.520000
Si599
AN104
AN141
AN198
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Si570
Abstract: I2C address translator C8051F320 GTL2002 Si571 Si57xEVBSoftware
Text: Si57x FAQ Rev. 0.2 Overview This document is intended to address common questions about the Silicon Laboratories programmable oscillator Si570 XO and Si571 VCXO products. The term Si57x stands for both the Si570 and Si571. FAQ 1. What is the tuning resolution of the Si57x?
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Si57x
Si570
Si571
Si571.
Si57x?
I2C address translator
C8051F320
GTL2002
Si57xEVBSoftware
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connector FMC
Abstract: connector FMC LPC samtec FMC LPC sp605 VITA-57 Samtec ASP header 12-pin VITA57 virtex-6 ML605 user guide UG537 ASP-134488-01
Text: FMC XM105 Debug Card User Guide UG537 v1.3 June 16, 2011 Copyright 2009–2011 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.
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XM105
UG537
XM105.
J17-F1
XM105
connector FMC
connector FMC LPC samtec
FMC LPC
sp605
VITA-57
Samtec ASP header 12-pin
VITA57
virtex-6 ML605 user guide
UG537
ASP-134488-01
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SI570
Abstract: Silabs Si571 SI570 PLL Si57x-EVB
Text: Si 5 7 0 / S i 5 71 10 MH Z TO 1.4 G H Z I 2C P ROGRAMMABLE XO/VCXO Features Any programmable output frequencies from 10 to 945 MHz and select frequencies to 1.4 GHz I2C serial interface 3rd generation DSPLL with superior jitter performance
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Si5602
Si570
XO/Si571
Silabs
Si571
SI570 PLL
Si57x-EVB
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connector FMC LPC samtec
Abstract: VITA-57 ML605 SI570 connector FMC UG536 ASP-134488-01 VITA57 XM104 example ml605
Text: FMC XM104 Connectivity Card User Guide UG536 v1.1 September 24, 2010 Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the
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XM104
UG536
Si5368
XM104
connector FMC LPC samtec
VITA-57
ML605
SI570
connector FMC
UG536
ASP-134488-01
VITA57
example ml605
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si514
Abstract: SI510
Text: AN765 T HERMAL A NALYSIS OF S I L I C O N L ABS T I M I N G D EVICES 1. Introduction The junction temperature of semiconductor devices affects reliability and performance of Integrated Circuits ICs , including timing devices. This application note provides the following:
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AN765
si514
SI510
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LCM-S02002DSR
Abstract: No abstract text available
Text: LatticeECP3 Video Protocol Board – Revision C User’s Guide October 2012 Revision: EB52_01.3 LatticeECP3 Video Protocol Board – Revision C User’s Guide Introduction The LatticeECP3™ FPGA family includes many features for video applications. For example, DisplayPort, SMPTE
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BLM21AG601SN1D
LCM-S02002DSR
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Untitled
Abstract: No abstract text available
Text: DSP Development Kit, Stratix V Edition User Guide DSP Development Kit, Stratix V Edition User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01119-1.1 Feedback Subscribe 2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos
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UG-01119-1
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VITA-57
Abstract: No abstract text available
Text: FMC XM101 LVDS QSE Card User Guide UG538 v1.1 September 24, 2010 Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the
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XM101
UG538
M24C02
XM101
VITA-57
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Untitled
Abstract: No abstract text available
Text: Arria V GX FPGA Development Kit User Guide Arria V GX FPGA Development Kit User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01112-1.0 Feedback Subscribe 2012 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos
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570FAB000433DG
Abstract: 88E1111 si570 88E1111-B2 HDMI to SDI converter chip 88E1111-B2-CAAIC000 schematic diagram lcd monitor samsung 19-PIN HDMI CONNECTOR LT3025 LCM-S01602DSR/C
Text: Stratix IV GX FPGA Development Board Reference Manual 101 Innovation Drive San Jose, CA 95134 www.altera.com Document Version: Document Date: 2.0 November 2009 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
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SDI ycbcr
Abstract: HD-SDI deserializer 16 bit parallel AN377 HD-SDI serializer 16 bit parallel video sdi distribution amplifier HD-SDI repeater 259M-D sdi distributed amplifier smpte rp 184 HDTV sync generator
Text: AN377 TIMING AND SYNCHRONIZATION IN B ROADCAST V I D E O 1. Introduction Digitization of video signals has been common practice in broadcast video for many years. Early digital video was commonly encoded on a 10-bit parallel bus, but as higher processing speeds became practical, a serial form of the
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10-bit
SDI ycbcr
HD-SDI deserializer 16 bit parallel
AN377
HD-SDI serializer 16 bit parallel
video sdi distribution amplifier
HD-SDI repeater
259M-D
sdi distributed amplifier
smpte rp 184
HDTV sync generator
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si570
Abstract: Si552 1.8 GHz SAW oscillator ADC 10 Ghz Si571 Si534 Si550 SI595 375 07 Si599
Text: Frequency Control Solutions THE NEW STANDARD IN FREQUENCY CONTROL FEATURES • Wide range of operation: 10 MHz to 1.4 GHz • Two week lead time for samples pf any frequency • Superior jitter performance: <0.3 psRMS typ • Any frequency, quad, dual and single
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si570
Si552
1.8 GHz SAW oscillator
ADC 10 Ghz
Si571
Si534
Si550
SI595
375 07
Si599
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IC 567 pll 8pin
Abstract: SI570 SI571 AN266 AN255 Silabs AN256 Si550 si 810 OC-1922
Text: Si 5 7 0 / S i 5 71 10 MH Z TO 1.4 G H Z I 2C P ROGRAMMABLE XO/VCXO Features Any programmable output frequencies from 10 to 945 MHz and select frequencies to 1.4 GHz I2C serial interface 3rd generation DSPLL with superior jitter performance
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IC 567 pll 8pin
SI570
SI571
AN266
AN255
Silabs
AN256
Si550
si 810
OC-1922
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19-PIN HDMI CONNECTOR
Abstract: 570FAB000433DG PC28F512P30BF schematic diagram of laptop motherboard 88E1111 Marvell PHY 88E1111 Datasheet marvel phy 88e1111 reference design Marvell PHY 88E1111 layout samsung lcd monitor power board schematic 88E1111 PHY registers map
Text: Stratix IV GX FPGA Development Board Reference Manual Stratix IV GX FPGA Development Board Reference Manual 101 Innovation Drive San Jose, CA 95134 www.altera.com MNL-01043-2.2 Subscribe 2010 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.
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MNL-01043-2
19-PIN HDMI CONNECTOR
570FAB000433DG
PC28F512P30BF
schematic diagram of laptop motherboard
88E1111
Marvell PHY 88E1111 Datasheet
marvel phy 88e1111 reference design
Marvell PHY 88E1111 layout
samsung lcd monitor power board schematic
88E1111 PHY registers map
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Untitled
Abstract: No abstract text available
Text: Cyclone V GT FPGA Development Kit User Guide Cyclone V GT FPGA Development Kit User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01135-1.0 Feedback Subscribe 2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos
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Untitled
Abstract: No abstract text available
Text: Transceiver Signal Integrity Development Kit, Stratix V GT Edition User Guide Transceiver Signal Integrity Development Kit, Stratix V GT Edition User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01114-1.1 Feedback Subscribe 2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos
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PTD08D021W
Abstract: MT8JTF12864HZ-1G6G1 LVCMOS18 M88E1111 ADV7511KSTZ virtex 5 lcd display controller Marvell alaska 88E1111 ba37 diode
Text: VC707 Evaluation Board for the Virtex-7 FPGA User Guide UG885 v1.4 May 12, 2014 The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL
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VC707
UG885
2002/96/EC
2002/95/EC
2006/95/EC,
2004/108/EC,
PTD08D021W
MT8JTF12864HZ-1G6G1
LVCMOS18
M88E1111
ADV7511KSTZ
virtex 5 lcd display controller
Marvell alaska 88E1111
ba37 diode
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ZYNQ-7000
Abstract: SOBEL
Text: Zynq-7000 All Programmable SoC ZC702 Evaluation Kit Getting Started Guide UG926 v1.2.1 September 20, 2012 Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum
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ZC702
UG926
2002/96/EC
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SOBEL
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altera board
Abstract: No abstract text available
Text: Stratix V GX FPGA Development Kit User Guide Stratix V GX FPGA Development Kit User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01103-1.3 Feedback Subscribe 2014 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos
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altera board
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netlogic tcam
Abstract: TCAM netlogic
Text: ML631 Virtex-6 HXT FPGA Packet Processor/Traffic Manager Evaluation Board User Guide UG841 v1.0 March 9, 2012 Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum
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ML631
UG841
Si570
com/support/documentation/ml631
netlogic tcam
TCAM netlogic
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Untitled
Abstract: No abstract text available
Text: Cyclone IV GX FPGA Development Kit User Guide Cyclone IV GX FPGA Development Kit User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01094-1.0 Subscribe Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, and specific device designations
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SI570
Abstract: virtex-7 virtex7 Si571 Si598 Si5324 Spartan-6 FPGA Si5368 Si599 VIRTEX-6
Text: Silicon Labs and Altera/Xilinx Timing Solutions Cross-Reference Guide Ideal for Clocking FPGAs • Multiple Altera and Xilinx FPGA reference designs Combination of frequency flexibility and jitter performance ideal for FPGAs High power supply noise rejection minimizes impact
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Si53x,
Si55x,
Si57x,
Si59x)
10MHz
Si53x/7x
Si55x)
OC-48/192
Si5338
SI570
virtex-7
virtex7
Si571
Si598
Si5324
Spartan-6 FPGA
Si5368
Si599
VIRTEX-6
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SI570
Abstract: Silabs SI571 SiLabs 570
Text: Si 5 7 0 / S i 5 71 P R E L I M I N A R Y D A TA S H E E T A N Y - R A T E I 2C P R O G R A M M A B L E XO/VCXO Features Any-rate programmable output frequencies from 10 to 945 MHz and select frequencies to 1.4 GHz I2C serial interface 3rd generation DSPLL with superior
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