Untitled
Abstract: No abstract text available
Text: Silicon360 S512 Series SRAMs 512Kx16,x32,x40-bit Radiation Tolerant Static RAM Features: • Fabricated in 90 nm process technology using custom EPI wafers • Total Dose: 300K rads Si • Prompt Dose: No burn out and latch-up; Dose rate ranging from 1.0E9 to
|
Original
|
Silicon360
512Kx16
x40-bit
8E11rad/second
106MeV-cm2
84-Lead
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SILICON360 S51232FVRH: 512K x 32 Bit Radiation Tolerant Static RAM Product Feature Sheet Features • Fabricated in 90 nm process technology using custom EPI wafers • Total Dose: 300K rads Si • Prompt Dose: No burn out and latchup; Dose rate ranging from 1.0E9 to
|
Original
|
SILICON360
S51232FVRH:
8E11rad/second
IO0-IO31
silicon360
|
PDF
|
Untitled
Abstract: No abstract text available
Text: March 2012 Contract Low Dose Rate Irradiation Services Intersil introduces low dose rate irradiation services at 0.01 rad Si /s on a contract basis, using a panoramic 60Co irradiator in the Palm Bay, FL facility. External view of the low dose rate 60Co irradiator.
|
Original
|
1-888-INTERSIL
D-85737
LC-105
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SILICON360 S51216FVRH: 512K x 16-Bit Radiation Tolerant Static RAM Product Feature Sheet Features • Fabricated in 90 nm process technology using custom EPI wafers • Total Dose: 300 K rads Si • Prompt Dose: No burn out and latchup; Dose rate ranging from 1.0E9 to
|
Original
|
SILICON360
S51216FVRH:
16-Bit
8E11rad/second
106MeV-cm2
IO0-IO31
silicon360
|
PDF
|
Untitled
Abstract: No abstract text available
Text: S51216FVRH: 512K x 16-Bit Radiation-Tolerant Static RAM Product Feature Sheet Features • Fabricated in 90 nm process technology using custom EPI wafers • Total Dose: 300 krads Si • Prompt Dose: No burn out and latchup; Dose rate ranging from 1.0 E9 to 1.8
|
Original
|
S51216FVRH:
16-Bit
E11rad/second
IO0-IO31
silicon360
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SILICON360 S51240FVRH: 512K x 40 Bit Radiation Tolerant Static RAM Product Feature Sheet Features • Fabricated in 90 nm process technology using custom EPI wafers • Total Dose: 300 K rads Si • Prompt Dose: No burn out and latchup; Dose rate ranging from 1.0E9 to
|
Original
|
SILICON360
S51240FVRH:
8E11rad/second
106MeV-cm2
IO0-IO31
silicon360
|
PDF
|
mil-std-1750a
Abstract: AKO3 abo cpu ako speed control abb eiw mps 0815 td1513 MIL-STD-1750 mps 0812 L64500
Text: i si LSI LOGIC L64550 MILSTD1750A MBU Peripheral Device LSI Logic Corporation 1551 McCarthy Blvd Milpitas CA 95035 4 0 8 .4 3 3 .8 0 0 0 Telex 172153 Preliminary j a i U n ‘ 005790 5 m Features Logic Symbol and Chip Layout LSI Logic Corporation's L64550 is a monolithic
|
OCR Scan
|
L64550
MILSTD1750A
L64550
L64500
MIL-STD-1750A
AKO3
abo cpu
ako speed control
abb eiw
mps 0815
td1513
MIL-STD-1750
mps 0812
|
PDF
|
mil-std-1750a
Abstract: MILSTD1750A 1750a AKO3 TST02 L6450
Text: i si LSI LOGIC L64550 MILSTD1750A MBU Peripheral Device LSI Logic Corporation 1551 McCarthy Blvd Milpitas CA 95035 4 0 8 .4 3 3 .8 0 0 0 Telex 172153 Preliminary j a i U n ‘ 005790 5 m Features Logic Symbol and Chip Layout LSI Logic Corporation's L64550 is a monolithic
|
OCR Scan
|
L64550
MILSTD1750A
L64500
MIL-STD-1750A
1750a
AKO3
TST02
L6450
|
PDF
|
74LV257
Abstract: 74LV257PW MS-012AB
Text: Philips Semiconductors Product specification Quad 2-input multiplexer 3-State 74LV257 FEATURES DESCRIPTION • Optim ized for low voltage applications: 1.0 to 3.6 V The 74LV257 is a low-voltage Si-gate CM OS device and is pin and function com patible with 74HC/HCT257.
|
OCR Scan
|
74LV257
SQT402-1
MO-153
74LV257
74LV257PW
MS-012AB
|
PDF
|
74LV393PW
Abstract: 74LV393 12v 2cp
Text: Philips Semiconductors Product specification Dual 4-bit binary ripple counter 74LV393 FEATURES DESCRIPTION • Optim ized for Low Voltage applications: 1.0 to 3.6V The 74LV393 is a lo w -vo ltag e Si-gate CMOS device and is pin and function com patible with 74HC/HCT393.
|
OCR Scan
|
74LV393
TSSOP14:
SQT402-1
MO-153
74LV393PW
12v 2cp
|
PDF
|
12v to 220 v ac inverter SCHEMATIC DIAGRAM
Abstract: dc to ac inverter schematic diagram 74HCU04 74LVU04 74LVU04D 74LVU04N 74LVU04PW LVU04
Text: Philips Semiconductors Product specification Hex inverter 74LVU04 FEATURES DESCRIPTION • W ide operating voltage: 1.0 to 5.5 V The 74LVU04 is a low-voltage, Si-gate CMOS device and is pin compatible with the 74HCU04. • Optim ized for Low Voltage applications: 1.0 to 3.6 V
|
OCR Scan
|
74LVU04
74LVU04
74HCU04.
SQT402-1
MO-153
12v to 220 v ac inverter SCHEMATIC DIAGRAM
dc to ac inverter schematic diagram
74HCU04
74LVU04D
74LVU04N
74LVU04PW
LVU04
|
PDF
|
74LV11
Abstract: 74LV11PW
Text: Philips Semiconductors Product specification Triple 3-input AND gate 74LV11 FEATURES DESCRIPTION • Optim ized for Low Voltage applications: 1.0 to 3.6 V The 74LV11 is a low-voltage Si-gate CM OS device and is pin and function com patible with 74H C /H C T11.
|
OCR Scan
|
74LV11
SQT402-1
MO-153
74LV11
74LV11PW
|
PDF
|
273505
Abstract: No abstract text available
Text: NRR ï 2 1993 COM’L: D/2 SI Advanced Micro Devices PAL16R8D/2 Series 10 ns 20-Pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • 10 ns maximum propagation delay Power-up reset for initialization ■ Drop in replacement for PAL16R8D series with same specifications
|
OCR Scan
|
PAL16R8D/2
20-Pin
PAL16R8D
PAL16L8D/2,
PAL16R8D/2,
PAL16R6D/2,
PAL16R4D/2)
273505
|
PDF
|
74LV125
Abstract: 74LV125PW
Text: Philips Semiconductors Product specification Quad buffer/line driver; 3-State 74LV125 FEATURES DESCRIPTION • W ide operating voltage: 1.0 to 5.5 V The 74LV125 is a low-voltage Si-gate CM OS device and is pin and function com patible with 74H C /H C T125.
|
OCR Scan
|
74LV125
OT337-1
MO-150AB
74LV125
74LV125PW
|
PDF
|
|
6 pin 2D 1002
Abstract: 74LV74 2d 1002 6 pin 74LV74PW 2D 1002
Text: Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive edge-trigger 74LV74 FEATURES DESCRIPTION • W ide operating voltage: 1.0 to 5.5V The 74LV74 is a low-voltage Si-gate CMOS device and is pin and function com patible with 74HC/HCT74.
|
OCR Scan
|
74LV74
74HC/HCT74.
SQT402-1
MO-153
6 pin 2D 1002
2d 1002 6 pin
74LV74PW
2D 1002
|
PDF
|
74LV10
Abstract: 74LV10PW
Text: Philips Semiconductors Product specification Triple 3-input NAND gate 74LV10 FEATURES DESCRIPTION • Optim ized for Low Voltage applications: 1.0 to 3.6 V The 74LV10 is a l°w -voltage Si-gate CMOS device and is pin and function com patible with 74H C /H C T10.
|
OCR Scan
|
74LV10
SQT402-1
MO-153
74LV10
74LV10PW
|
PDF
|
74LV393PW
Abstract: 74LV393 12v 2cp
Text: Philips Semiconductors Product specification Dual 4-bit binary ripple counter 74LV393 FEATURES DESCRIPTION • Optim ized for Low Voltage applications: 1.0 to 3.6V The 74LV393 is a lo w -vo ltag e Si-gate CMOS device and is pin and function com patible with 74HC/HCT393.
|
OCR Scan
|
74LV393
SQT402-1
MO-153
74LV393PW
74LV393
12v 2cp
|
PDF
|
74LVU04
Abstract: el inverter Schematic 74HCU04 74LVU04D 74LVU04N 74LVU04PW LVU04
Text: Philips Semiconductors Product specification Hex inverter 74LVU04 FEATURES DESCRIPTION • W ide operating voltage: 1.0 to 5.5 V The 74LVU04 is a low-voltage, Si-gate CMOS device and is pin compatible with the 74HCU04. • Optim ized for Low Voltage applications: 1.0 to 3 .6 V
|
OCR Scan
|
74LVU04
74LVU04
74HCU04.
SQT402-1
MO-153
el inverter Schematic
74HCU04
74LVU04D
74LVU04N
74LVU04PW
LVU04
|
PDF
|
AIC-6260AL
Abstract: aic6260 ASW-1240 AHA-1640 aic-6260 ASW-1210 aha 1640 IBM 286 schematic AIC6260AQ AIC-6260/6360/6370
Text: Single-Chip AT-to-SCSI I/O Processor AIC-6260AL: 68-pin PLCC AIC-6260AQ: 80-pin QFP SC SI Designer: AIC-6260 Design-ln Kit Features • Single-chip AT-to-SCSI host adapter • Low cost connectivity to multiple SCSI peripherals • Compatible with SCSI-2 and
|
OCR Scan
|
AIC-6260AL:
AIC-6260AQ:
68-pin
80-pin
AIC-6260
16-bit
AIC-6260,
128-byte
AIC-6260AL
aic6260
ASW-1240
AHA-1640
ASW-1210
aha 1640
IBM 286 schematic
AIC6260AQ
AIC-6260/6360/6370
|
PDF
|
74LV107
Abstract: 74LV107PW MS-012AB
Text: Philips Semiconductors Product specification Dual JK flip-flop with reset; negative-edge trigger 74LV107 FEATURES DESCRIPTION • W ide operating: 1.0 to 5.5 V The 74LV107 is a low-voltage Si-gate CM OS device that is pin and function com patible with 74H C /H C T107.
|
OCR Scan
|
74LV107
SQT402-1
MO-153
74LV107
74LV107PW
MS-012AB
|
PDF
|
f03T
Abstract: No abstract text available
Text: OMTDML [RiEILEM Si Final Electrical Specifications L in t iA B TECHNOLOGY LTC1516 Micropower, Regulated 5V Charge Pump DC/DC Converter May 1996 FCfflUIKS D€SCRIPTIOn • Ultralow Power: Typical Operating Ice = 12 mA ■ Short Circuit/Thermal Protection The LTC 1516 is a micropower charge pump DC/DC
|
OCR Scan
|
LTC1516
12yAtypical
254mm)
LT1054
LTC1144
LTC1261
LTC1262
LTC1550/51
100mA
f03T
|
PDF
|
74LV27
Abstract: 74LV27PW MS-012AB
Text: Philips Semiconductors Product specification Triple 3-input NOR gate 74LV27 FEATURES DESCRIPTION • W ide operating voltage: 1.0 to 5.5 V The 74LV27 is a low-voltage Si-gate CMOS device and is pin and function com patible with 74HC/HCT27. • Optim ized for Low Voltage applications: 1.0 to 3.6 V
|
OCR Scan
|
74LV27
SQT402-1
MO-153
74LV27
74LV27PW
MS-012AB
|
PDF
|
Untitled
Abstract: No abstract text available
Text: I INFAR SYSTEMS LSVCEllN ABSOLUTE MAXIMUM KATIMGS 25 Degree C Gate-Drain or Gate-Source Voltage: 25V Gate Current: 10iA Total Device Dissipation at TA = 25 Degree C: 300aH Storage Teiperature Sange: -55 to +175 Degree C S i6 ¿ S ? •,[o- * Si Electrical Characteristics (25 Degree C unless otherwise noted)
|
OCR Scan
|
300aH
|
PDF
|
74LV08
Abstract: 74LV08PW
Text: Philips Semiconductors Product specification Quad 2-input AND gate 74LV08 FEATURES DESCRIPTION • W ide operating voltage: 1.0 to 5.5 V The 74LV08 is a low-voltage Si-gate CMOS device and is pin and function com patible with 74HC/HCT08. • Optim ized for Low Voltage applications: 1.0 to 3.6 V
|
OCR Scan
|
74LV08
SQT402-1
MO-153
74LV08
74LV08PW
|
PDF
|