CDCLVP110
Abstract: CDCLVP110MVFR LVEP111 MC100 PTN1111 SCAA056
Text: CDCLVP110 www.ti.com SCAS683D – JUNE 2002 – REVISED JANUARY 2011 Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver Check for Samples: CDCLVP110 FEATURES 1 • • • • • • • • • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock
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CDCLVP110
SCAS683D
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
CDCLVP110MVFR
LVEP111
PTN1111
SCAA056
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CDCLVP110
Abstract: LVEP111 MC100 PTN1111 SCAA056 S-PQFP-G32 scas683
Text: CDCLVP110 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER SCAS683 A– JUNE 2002 – REVISED AUGUST 2002 D Distributes One Differential Clock Input D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 Pair LVPECL/HSTL to Ten Differential LVPECL Clock Outputs
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CDCLVP110
SCAS683
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
LVEP111
PTN1111
SCAA056
S-PQFP-G32
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CDCLVP110
Abstract: CDCLVP110VF LVEP111 MC100 PTN1111 SCAA056
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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Original
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
CDCLVP110VF
LVEP111
PTN1111
SCAA056
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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Original
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683D – JUNE 2002 – REVISED JANUARY 2011 Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver Check for Samples: CDCLVP110 FEATURES 1 • • • • • • • • • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock
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Original
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CDCLVP110
SCAS683D
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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Original
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
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PDF
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CDCLVP110
Abstract: CDCLVP110MVFR LVEP111 MC100 PTN1111 SCAA056
Text: CDCLVP110 www.ti.com SCAS683B – JUNE 2002 – REVISED JANUARY 2010 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER Check for Samples: CDCLVP110 FEATURES 1 • • • • • • • • • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock
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CDCLVP110
SCAS683B
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
CDCLVP110MVFR
LVEP111
PTN1111
SCAA056
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PDF
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CDCLVP110
Abstract: CDCLVP110VF LVEP111 MC100 PTN1111 SCAA056
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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Original
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
CDCLVP110VF
LVEP111
PTN1111
SCAA056
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683D – JUNE 2002 – REVISED JANUARY 2011 Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver Check for Samples: CDCLVP110 FEATURES 1 • • • • • • • • • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock
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Original
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CDCLVP110
SCAS683D
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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Original
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683D – JUNE 2002 – REVISED JANUARY 2011 Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver Check for Samples: CDCLVP110 FEATURES 1 • • • • • • • • • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock
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Original
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CDCLVP110
SCAS683D
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
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PDF
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CDCLVP110
Abstract: CDCLVP110VF LVEP111 MC100 PTN1111 SCAA056
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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Original
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
CDCLVP110VF
LVEP111
PTN1111
SCAA056
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PDF
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CDCLVP110
Abstract: LVEP111 MC100 PTN1111 SCAA056
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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Original
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
LVEP111
PTN1111
SCAA056
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683C – JUNE 2002 – REVISED NOVEMBER 2010 Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver Check for Samples: CDCLVP110 FEATURES 1 • • • • • • • • • Distributes One Differential Clock Input Pair
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CDCLVP110
SCAS683C
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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Original
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
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PDF
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SCAA056
Abstract: CDCLVP110 CDCLVP110VF LVEP111 MC100 PTN1111
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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Original
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
SCAA056
CDCLVP110VF
LVEP111
PTN1111
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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Original
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
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PDF
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CDCLVP110
Abstract: LVEP111 MC100 PTN1111 SCAA056 S-PQFP-G32
Text: CDCLVP110 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER SCAS683 – JUNE 2002 D Distributes One Differential Clock Input D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 Pair LVPECL/HSTL to Ten Differential LVPECL Clock Outputs Fully Compatible With
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CDCLVP110
SCAS683
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
LVEP111
PTN1111
SCAA056
S-PQFP-G32
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683D – JUNE 2002 – REVISED JANUARY 2011 Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver Check for Samples: CDCLVP110 FEATURES 1 • • • • • • • • • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock
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Original
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CDCLVP110
SCAS683D
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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Original
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
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PDF
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SN65LVDS100 Application Report
Abstract: CDC111 CDCLVP110 CDCVF111 SN65LVDS101 SN65LVDT100 SN65LVDT33 SLLA101 sn65lvds CML100
Text: Application Report SCAA059C – March 2003 – Revised October 2007 AC-Coupling Between Differential LVPECL, LVDS, HSTL, and CML Kal Mustafa/Chris Sterzik. High Performance Analog
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SCAA059C
SN65LVDS100 Application Report
CDC111
CDCLVP110
CDCVF111
SN65LVDS101
SN65LVDT100
SN65LVDT33
SLLA101
sn65lvds
CML100
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PN9000
Abstract: HP8656B HP6624A system DC power supply pn9000 Absolute Phase Noise Measurements 11801C SCAA059 MC100EP SCAU007 Aeroflex PN9000 HP6624A
Text: Application Report SCAA068 – August 2003 Advantage of Using TI’s Lowest Jitter Differential Clock Buffer Heather McClendon/Kal Mustafa High Performance Analog/CDC ABSTRACT This application report presents various jitter and phase noise measurements of three
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SCAA068
PN9000
HP8656B
HP6624A system DC power supply
pn9000 Absolute Phase Noise Measurements
11801C
SCAA059
MC100EP
SCAU007
Aeroflex PN9000
HP6624A
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PDF
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CML Vterm
Abstract: CDC111 CDCLVD110 CDCLVP110 CDCVF111 SN65LVDS101 SN65LVDT100 SN65LVDT122 SN65LVDT33 SN64LVDS33
Text: Application Report SCAA059 – March 2003 AC-Coupling Between Differential LVPECL, LVDS, HSTL, and CML Kal Mustafa/Chris Sterzik High Performance Analog ABSTRACT This report provides a quick reference of ac-coupling techniques for interfacing between different logic levels. The four differential signaling levels found in this report are lowvoltage positive-referenced emitter coupled logic LVPECL , low-voltage differential
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SCAA059
CML Vterm
CDC111
CDCLVD110
CDCLVP110
CDCVF111
SN65LVDS101
SN65LVDT100
SN65LVDT122
SN65LVDT33
SN64LVDS33
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PDF
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ENG-46158
Abstract: TMS320TCI6484 SCEA035 scas683 TMS320C6457 DSP Ethernet Media Access Controller mdio level translator slls781 SPRU732 jesd79-2B CDCL1810
Text: Application Report SPRAAV7B—October 2009 TMS320TCI6484 and TMS320C6457 DSPs Hardware Design Guide High-Performance and Multicore Processors Randy Rosales Abstract This application note describes hardware system design considerations for the TMS320TCI6484 and TMS320C6457 DSPs.
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TMS320TCI6484
TMS320C6457
ENG-46158
SCEA035
scas683
TMS320C6457 DSP Ethernet Media Access Controller
mdio level translator
slls781
SPRU732
jesd79-2B
CDCL1810
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