SCAS682B Search Results

CDC5801

Abstract: CDC5801DBQ CDC5801DBQR CDC5801DBQRG4 CDCVF2310
Text: CDC5801 LOW JITTER CLOCK MULTIPLIER AND DIVIDER WITH PROGRAMMABLE DELAY AND PHASE ALIGNMENT SCAS682B − OCTOBER 2002 − OCTOBER 2005 D Low Jitter Clock Multiplier by x4, x6, x8. D D D D D D D D D D D Input Frequency Range 19 MHz to 125 MHz . Supports Output Frequency